#SnowMan# BEST ALBUM『THE BEST 2020 - 2025』 2025.01.22 Release! 「SBY」Dance Practice 公開🎬 #SnowMan_SBY# #SnowMan_THEBEST# #トリリオンゲーム#

Some quick thoughts on Intel's EMIB-T packaging for the new 2H27 Google TPU (Humufish). Based on my industry checks: 【How to read EMIB-T's 90% yield?】 1. Given Intel's track record running EMIB in mass production, hitting 90% technology validation yield on EMIB-T (still under development) is a very positive but reasonable data point. 2. Intel benchmarks EMIB production/assembly yield against FCBGA. Industry FCBGA yield today is generally above 98%. 3. On yield, getting from 90% to 98% is harder than getting from project kickoff to 90%. And technology validation yield ≠ final production yield, especially with some Humufish specs still unfinalized. So long-term, I'm positive on Intel's advanced packaging story. Near to mid-term, I'm staying cautious on how they get there. 【From 90% to 98%. Looks like just a few points. Does Google care? Absolutely】 1. Google recently asked TSMC how much it could save by placing wafer orders for Humufish's main compute die (designed in-house by Google) directly, rather than routing them through MediaTek. 2. Google and MediaTek have run a semi-COT model since day one (8t). MediaTek's mark-up sits mostly on the parts it designs itself, so whether Google places the wafer orders for main compute die directly isn't a key swing factor for MediaTek's earnings trajectory. 3. But Google even probing whether it can squeeze out the pass-through mark-up on wafer orders tells you something: Google has shifted from easygoing buyer to hard-nosed on cost. The reason is simple: to take on Nvidia head-on, cost is Google's edge, which makes EMIB-T production yield Google's problem to solve. For context, TSMC's yield target on 5.5-reticle CoWoS in 2026 also starts at 98%. 【TSMC's position】 1. My understanding is TSMC is still working out how much advanced-node capacity to allocate to Humufish in 2H27, for two reasons: (1) it still wants the back-end packaging orders, though looks unlikely for now, and that's by design on Google's part; and (2) it's still gauging actual back-end output from EMIB-T, to avoid misallocating scarce advanced-node capacity. 2. Humufish's effective back-end output hinges on both EMIB-T and substrates, and both need to be tracked together. 3. On the Humufish semi-COT model, TSMC also prefers MediaTek to place the wafer orders for the main compute die. Beyond the close working relationship, the key point is MediaTek is TSMC's third-largest advanced-node customer in 2025. If TPU orders shift, MediaTek's scale makes it a natural buffer for TSMC to rebalance its wafer allocation mix.

Time to update your talking points and it’s time to tell the truth to the American people. Since 2019, California has no peers in the developed world: 40% growth. CA dominates in research and development — our success is not by chance, it’s by design. 18% of the world’s R&D right here in the Golden State.

New paper out of China sets the new lower bar for the Shor's algorithm over ECDSA for space-constrained systems. The authors of this new paper use some clever tricks to reduce the cost of point addition (a costly subroutine for ECDLP Shor's) by about 40% 835 logical qubits is the new lower bound for Shor's algorithm. 🧵