Just the SNPs darling “New Scots”, setting fire to a Scottish woman because they believed her choice of clothing was too revealing and was giving them urges that might have landed them in trouble

New TradFi Futures Launched! 🚀 HTX adds SNPS/USDT and ZCSH/USDT perpetual futures with up to 20x leverage. Join the New Coin Futures Trading Contest !

AI needs Synopsys's expertise "SAN FRANCISCO and SUNNYVALE, Calif., Sept. 30, 2026 /PRNewswire/ -- Synopsys (Nasdaq: SNPS) and OpenAI today announced a strategic partnership that brings together OpenAI's advanced AI capabilities with Synopsys' industry-leading EDA tools and agentic AI capabilities to revolutionize the design of semiconductors. The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows. The agreement includes a revenue sharing arrangement and go-to-market collaboration to jointly make GPT-Synopsys available to customers worldwide."

$CDNS KEY READ-THROUGHS FROM CADENCE DESIGN SYSTEMS’ Q3 2026 EARNINGS CALL Cadence’s results provide strong evidence that AI is expanding semiconductor engineering activity, verification requirements, and demand for specialized design infrastructure. The most actionable implications are not uniformly bullish for every AI-related company. Cadence’s expansion from digital implementation into synthesis, signoff, and integrated workflows creates a negative competitive signal for Synopsys even as the overall EDA market strengthens. Further downstream, the call supports custom-silicon development, leading-edge foundry demand, and productivity gains at named chip-design customers. An important, less obvious supplier beneficiary is AMD’s high-end FPGA business, which supplies technology used in Cadence’s prototyping systems. NVIDIA also benefits from the expansion of GPU-accelerated engineering and customer-controlled AI deployments, although the disclosed activity is insufficient to establish a material near-term earnings contribution. The strongest conclusions concern the direction of these economic channels; undisclosed contract values, supplier content, and deployment economics prevent reliable company-specific EPS estimates. Countries below denote corporate domicile rather than the exchange on which a security trades. EDA SOFTWARE: FULL-FLOW ADOPTION CREATES A MORE CONSEQUENTIAL COMPETITIVE THREAT TO SYNOPSYS (READ-THROUGH 1) Affected company: Synopsys (SNPS: United States). Direction and magnitude: Negative for relative competitive positioning, with potentially moderate financial significance over multiple renewal cycles. The evidence does not establish an immediate consolidated revenue decline. Cadence reported 16 new digital and signoff full-flow wins and specifically emphasized expansion beyond its established digital-implementation position. Devgan stated that “some very, very large customers are deploying our full digital flow.” He also argued that advanced-node design makes it increasingly difficult to separate signoff or synthesis from implementation, while agentic workflows create an additional requirement for tightly integrated vertical flows. The transmission mechanism is competitive displacement and reduced incremental wallet share in categories where Synopsys has substantial exposure. Historically, a customer could use Cadence for implementation while retaining another vendor’s synthesis, timing analysis, or verification products. An integrated agent that repeatedly moves between those tools creates incentives to standardize more of the workflow with the vendor controlling implementation and orchestration. Cadence’s agent strategy can therefore increase the commercial value of an existing implementation relationship rather than requiring an entirely new customer acquisition. This matters disproportionately because mature EDA software has substantial fixed development costs. A lost expansion opportunity or renewal discount can affect incremental profit more than the associated revenue percentage suggests. Even without outright displacement, Synopsys may need to invest more heavily in interoperability, agent functionality, and commercial concessions to defend its position. The risk is weaker growth relative to the available market, not necessarily declining absolute sales. The near-term trading catalyst is greater scrutiny of Synopsys’s next guidance and commentary on digital design, full-flow adoption, and customer expansion. The fundamental effect is more likely to emerge over approximately 12-36 months as projects migrate and contracts renew. Synopsys’s own August results already showed strong EDA demand and improving Design IP performance, providing important counterevidence against interpreting Cadence’s wins as an immediate deterioration in Synopsys’s business. The high-conviction negative conclusion is intensifying competitive pressure; a quantified market-share loss is not established. ENGINEERING SOFTWARE: AGENTS REINFORCE THE VALUE OF VALIDATED DESIGN ENGINES RATHER THAN ELIMINATE THEM (READ-THROUGH 2) Affected companies: Synopsys (SNPS: United States) and Siemens (SIE: Germany). Direction and magnitude: Positive structural demand implications, potentially material for Synopsys and its Ansys operations; meaningful within Siemens’s engineering-software businesses but smaller at consolidated Siemens level. Cadence’s recurring revenue grew 18%, separate from the principal up-front hardware contribution. Wall explained that agents can perform substantially more design exploration than individual engineers and repeatedly invoke the underlying tools. His commercial explanation was explicit: “Cadence monetizes the underlying design engines and our agentic orchestration capabilities.” Management also acknowledged that customers will continue building their own agents. The important implication is that customer-developed AI does not necessarily disintermediate the engineering-software vendor. An agent can generate design candidates, scripts, or workflow decisions, but those outputs still require synthesis, simulation, verification, timing analysis, and physical validation. Ownership of the trusted engineering engine remains economically valuable even when the customer controls the user interface or orchestration layer. That supports the broader investment case for Synopsys’s design and simulation portfolio and Siemens’s EDA and engineering-software offerings. The positive channel is greater consumption, capacity expansion, broader product adoption, and potentially improved renewal economics. It is not simply additional AI subscription revenue. Ansys exposure belongs to Synopsys following the completed acquisition, rather than to a separately listed Ansys security. The distinction from generic seat-based software is significant. If agents reduce the number of engineers required for a task while increasing the number of experiments conducted, engineering-tool demand can grow even when engineering headcount does not. Revenue capture will nevertheless depend on licensing terms: higher utilization within an existing unlimited or underutilized contract does not automatically generate incremental sales. The near-term implication is supportive sector sentiment and reduced credibility for a broad “AI replaces EDA” thesis. The longer-duration catalyst is evidence during 2027 that higher agent-driven workloads are converting into larger contracts and paid capacity. Synopsys had already reported strong EDA demand in August, so Cadence corroborates an established industry trend rather than revealing previously unknown Synopsys orders. A related trading safeguard is important: the supplied Bloomberg notice’s $4.2 billion RPO figure should not be interpreted as a collapse in total contracted demand. Cadence’s formal release identifies $8.2 billion of total backlog and $4.2 billion expected to be recognized from remaining performance obligations during the next 12 months. The mismatched comparison does not support a bearish EDA-sector bookings conclusion. SEMICONDUCTOR VERIFICATION SUPPLY CHAIN: AMD HAS A DIRECT, UNDERAPPRECIATED EXPOSURE THROUGH HIGH-END FPGAS (READ-THROUGH 3) Affected company: Advanced Micro Devices (AMD: United States). Direction and magnitude: Positive for high-end adaptive-computing products; modest at consolidated AMD scale, but more direct than a generic read-through to AI accelerators. Cadence reported another record hardware quarter, a strong Q4 pipeline, and inventory accumulation to support customer orders. Devgan explained that hardware is generally “sold or consumed based on design size.” Wall stated that there were “no capacity or supply-chain constraints” preventing Cadence from addressing the backlog. The supplier relationship is verifiable: Cadence’s Protium X3 System Studio documentation identifies AMD’s Versal VP1902 FPGA as the underlying programmable device. More demand for FPGA-based prototyping capacity therefore supports demand for AMD’s high-end adaptive silicon. This provides AMD with exposure to the engineering infrastructure used to develop chips, including chips that may eventually compete with AMD’s own processors or accelerators. The accounting sequence matters. AMD supplies components before Cadence completes and delivers the associated systems. Cadence’s inventory accumulation can therefore corroborate supplier shipments already made rather than imply entirely new AMD orders after this call. The appropriate positive conclusion is sustained demand and potential replenishment, not a mechanically timed increase in AMD’s next-quarter revenue. The exposure must also be bounded correctly. Cadence’s record hardware result combines Palladium and Protium, which use different architectures. The entire hardware revenue increase cannot be attributed to AMD FPGA content. Cadence did not disclose the Protium mix, component quantities, procurement timing, or supplier pricing. Higher performance per FPGA can also offset part of the unit demand created by larger designs. The near-term catalyst is AMD’s next Embedded/adaptive-computing update and evidence that prototyping demand is supporting revenue and product mix. The longer-duration driver is increasing verification intensity as chiplets, larger designs, and more complex system interactions require greater pre-silicon capacity. This is a positive verification-infrastructure exposure, not evidence of an improvement in AMD’s merchant-GPU competitive position. CUSTOM SILICON: EXPANDING DESIGN PARTICIPATION SUPPORTS BROADCOM AND MARVELL, BUT DOES NOT IDENTIFY NEW AWARDS (READ-THROUGH 4) Affected companies: Broadcom (AVGO: United States) and Marvell Technology (MRVL: United States). Direction and magnitude: Positive for custom-silicon and associated connectivity opportunities; potentially material over several years, with limited incremental near-term information from this call alone. Cadence stated that approximately 45% of its business now comes from systems companies rather than traditional semiconductor suppliers. Devgan described expanding design activity among hyperscalers and additional participation from space, financial-services, automotive, and robotics companies. Cadence’s IP revenue grew 24%, supported by custom silicon, advanced nodes, memory interfaces, and chiplet architectures. Management also noted that new entrants naturally create opportunities for IP, hardware, and design services. The economic transmission is broader than customers writing their own RTL. More custom-silicon programs increase demand for implementation expertise, high-speed interfaces, memory connectivity, packaging integration, verification, and manufacturing execution. Broadcom and Marvell participate in these technically demanding parts of the development process. Lowering selected design barriers can increase the number of viable programs without eliminating the need for experienced semiconductor partners. The strongest positive implication is therefore expansion of the custom-silicon opportunity, including supporting silicon and connectivity, rather than an assumption that every new design becomes a large accelerator program. Smaller entrants may use licensed IP and design services without generating hyperscaler-scale production volumes. Design starts also precede meaningful production revenue, often by a substantial period. The novelty is limited. Broadcom’s September results already identified exceptionally strong demand for custom AI accelerators and networking. Marvell’s August release anticipated an acceleration in its custom business, and its October investor event had already put substantial long-term AI expectations into the market. Cadence provides independent corroboration from an upstream engineering supplier, not a new customer allocation or reason to add undisclosed programs to either company’s forecast. The near-term trading channel is confidence in existing custom-silicon growth expectations during the next earnings cycle. The more important fundamental effect is over approximately 12-36 months as additional programs convert into design wins, tapeouts, and production. No award should be assigned to Broadcom or Marvell from Cadence’s unnamed space-company engagement. A relevant competitive limitation is that better tools also help customers retain more design work internally. The high-conviction positive exposure is the expansion of complex custom-chip development; the percentage of spending captured by an outside partner remains program-specific. In portfolio terms, Broadcom, Marvell, and the major hyperscalers remain economically connected exposures rather than independent sources of AI diversification. FABLESS SEMICONDUCTORS: NAMED PRODUCTION DEPLOYMENTS SUPPORT ENGINEERING CAPACITY, NOT IMMEDIATE COST-CUTTING ESTIMATES (READ-THROUGH 5) Affected companies: MediaTek (2454: Taiwan) and Socionext (6526: Japan). Direction and magnitude: Positive for engineering productivity and execution capability; potentially meaningful over a product cycle, but limited evidence for immediate consolidated EPS changes. Cadence reported that MediaTek had deployed ChipStack in its production digital-verification flow, achieving a 50% to 70% improvement in verification coverage and engineering-effort improvements of 1.4x to 2x, with deployment expanding across design teams. Socionext was identified as deploying InnoStack in production design and expecting up to 5x overall productivity gains while maintaining design quality. MediaTek’s reported production use is particularly important because it is evidence of operational adoption rather than a laboratory demonstration. Better verification can reduce the probability of costly design escapes, while lower engineering effort per task can increase the number of designs or verification scenarios supported by an existing team. The economic benefit can appear through schedule reliability, additional product capacity, avoided rework, or lower development cost per program. For Socionext, the value is closely aligned with its custom-SoC business model. Reusing engineering knowledge and automating parts of physical design can improve the scalability of a scarce engineering workforce. Its October 20 announcement specifically described deployment on a large-scale 3-nanometer SoC and plans to expand the approach across projects. More projects supported per engineering team can improve growth capacity even if absolute R&D spending continues to rise. The distinction between measured and prospective outcomes is essential. MediaTek’s figures were presented as achieved deployment results; Socionext’s up to 5x figure remains an expectation. Neither establishes an equivalent reduction in total corporate engineering expense, total chip-development time, or cost of goods sold. Additional EDA licensing, compute, integration, and validation costs must also be considered. The clearest near-term catalyst is Socionext’s scheduled October 28 results, where deployment breadth, engineering capacity, and project conversion could provide additional evidence. However, the underlying Socionext announcement was already public before Cadence’s call, reducing its novelty as a trading signal. For MediaTek, the relevant next reporting-cycle evidence is expansion beyond the initial verification deployment and whether management associates the tools with improved delivery or development efficiency. The fundamental horizon is approximately 6-24 months. Productivity gains are more likely to be reinvested in additional designs and faster execution than immediately converted into headcount reductions. That is positive for competitiveness, but it argues against mechanically raising near-term margins by applying the reported task-level efficiency multiples to the entire cost base. LEADING-EDGE FOUNDRY AND PACKAGING: TSMC BENEFITS FROM DESIGN PROLIFERATION REGARDLESS OF WHICH CHIP ARCHITECTURE WINS (READ-THROUGH 6) Affected company: Taiwan Semiconductor Manufacturing Company (TSM: Taiwan). Direction and magnitude: Positive and potentially material over the medium term; limited incremental near-term surprise because TSMC had already reported strong leading-edge demand. Cadence highlighted new 2-nanometer projects, growing demand for advanced-node IP, expanding custom-silicon development, and the increasing importance of verifying chiplets as interconnected systems. Devgan emphasized that customers are verifying not only individual chiplets but also their interactions with other chiplets, while both component complexity and system scale are increasing. The transmission mechanism is broader participation in advanced manufacturing and packaging. More viable custom designs expand the prospective customer and product pipeline for leading-edge processes. Greater chiplet and system integration raises the importance of packaging, interfaces, and co-optimization rather than confining value creation to the transistor layer. TSMC has a comparatively architecture-agnostic exposure. A shift between merchant accelerators and customer-designed chips can redistribute value among chip vendors without necessarily reducing the foundry’s opportunity, provided the successful designs use its processes and packaging ecosystem. This makes TSMC less dependent on identifying the winning accelerator designer than an individual fabless supplier, although it remains highly exposed to the overall AI investment cycle. Cadence’s evidence is corroborative rather than a new demand inflection. TSMC’s October 15 release already showed 2-nanometer technology at 8% of wafer revenue and explicitly anticipated a steep further ramp in Q4. Cadence adds evidence from the design pipeline that advanced-node activity is broad and technically demanding. It does not establish new wafer allocations, additional packaging orders, or higher capital-expenditure guidance. The near-term catalysts are subsequent monthly revenue releases and confirmation of the leading-edge ramp. The longer-duration mechanism is conversion of today’s design activity into manufacturing revenue over approximately 12-24 months and beyond. The 48x future chip-size claim relayed by Devgan should not be translated into a 48x foundry, packaging, or equipment revenue forecast. It was a technology-roadmap observation, not a financial commitment. Design complexity, physical area, packaging content, manufacturing yield, and customer shipment volumes are different variables. Similarly, this call alone is insufficient to allocate incremental orders to specific lithography, bonding, testing, or cooling suppliers. ACCELERATED COMPUTING: NVIDIA BENEFITS FROM ENGINEERING WORKLOADS THAT DO NOT REQUIRE EXCLUSIVE DEPENDENCE ON FRONTIER MODELS (READ-THROUGH 7) Affected company: NVIDIA (NVDA: United States). Direction and magnitude: Positive for accelerated engineering and enterprise deployment; modest near-term consolidated financial significance, with a more important long-duration platform implication. Cadence reported strong adoption of Millennium, deployment of GPU-accelerated electronic and mechanical simulation, and a 5x acceleration in selected Nokia design and analysis workflows on an integrated on-premises platform. The Maestro announcement accompanying the call explicitly identified collaboration with NVIDIA through Nemotron models and OpenShell. These are concrete product relationships rather than a generic assumption that any AI application benefits NVIDIA. The positive economic channel is a combination of accelerated simulation, model customization, inference, and additional engineering exploration. A customer can choose smaller or specialized models and still require substantial accelerated computing to evaluate designs and run physics-based solvers. NVIDIA therefore does not need a single frontier-model provider to capture the entire orchestration layer for this workload category to expand. The deployment model is also significant. Customers can keep sensitive design information within their own environments while using specialized models and accelerated tools. That can unlock engineering workloads that would otherwise face confidentiality or governance barriers. Commercial opportunity can arise through customer-owned systems, dedicated enterprise infrastructure, or cloud deployment rather than exclusively through public-model API consumption. The reported up to 5x token efficiency is not a reliable indicator of an equivalent reduction in NVIDIA hardware demand. Token consumption is only part of total engineering compute. More efficient inference can lower the cost of launching experiments, while those experiments increase solver activity. Conversely, efficiency gains do not guarantee that total compute spending rises; workload expansion and utilization must be observed. The immediate catalyst is Maestro’s selected early-access rollout during Q4 2026 and additional production deployments of accelerated engineering tools. The NVIDIA collaboration was already announced earlier on the day of the call, so the earnings discussion is validation rather than a separate new contract. The more meaningful financial horizon is 2027 and beyond as these workflows move from selected deployments into broader production use. The portfolio implication is narrower than a blanket NVIDIA earnings upgrade. The call supports diversification of accelerated-computing demand into engineering and physical simulation, but discloses neither GPU quantities nor NVIDIA revenue. It also does not resolve the separate competitive question of how much hyperscaler compute ultimately moves toward custom accelerators. The positive read-through is to NVIDIA’s engineering-computing platform, not proof that every part of its existing market position benefits equally.

Here is every stock currently in the Invesco QQQ Trust $QQQ: NVIDIA $NVDA 8.49% weighting Apple $AAPL 7.71% Microsoft $MSFT 6.02% Micron Technology $MU 4.69% Amazon $AMZN 4.43% Advanced Micro Devices $AMD 3.34% Google (Class A) $GOOGL 3.15% Google (Class C) $GOOG 2.92% Tesla $TSLA 2.87% Broadcom $AVGO 2.83% Meta Platforms $META 2.77% Walmart $WMT 2.31% Intel $INTC 1.99% Cisco Systems $CSCO 1.93% Costco Wholesale $COST 1.86% Palantir Technologies $PLTR 1.84% Lam Research $LRCX 1.62% Applied Materials $AMAT 1.57% Netflix $NFLX 1.52% Palo Alto Networks $PANW 1.32% Space Exploration Technologies $SPCX 1.21% Amgen $AMGN 1.06% Texas Instruments $TXN 1.03% SanDisk $SNDK 1.01% Linde $LIN 1.00% KLA $KLAC 0.99% CrowdStrike Holdings $CRWD 0.98% T-Mobile US $TMUS 0.88% PepsiCo $PEP 0.85% Gilead Sciences $GILD 0.83% Marvell Technology $MRVL 0.82% Seagate Technology blockstack:native 0.82% Qualcomm $QCOM 0.78% Analog Devices $ADI 0.77% Shopify $SHOP 0.76% Western Digital $WDC 0.69% ASML Holding $ASML 0.68% Booking Holdings $BKNG 0.68% Vertex Pharmaceuticals $VRTX 0.62% Intuitive Surgical $ISRG 0.58% Starbucks $SBUX 0.54% Fortinet $FTNT 0.53% Adobe $ADBE 0.52% Automatic Data Processing $ADP 0.50% Constellation Energy $CEG 0.45% ARM Holdings $ARM 0.44% MercadoLibre $MELI 0.44% AppLovin $APP 0.42% Intuit $INTU 0.42% Comcast $CMCSA 0.42% DoorDash DASH 0.41% CSX CSX 0.40% Marriott International MAR 0.39% Monster Beverage MNST 0.39% Cadence Design Systems CDNS 0.38% Regeneron Pharmaceuticals REGN 0.38% Cintas CTAS 0.36% Synopsys SNPS 0.35% Mondelez International MDLZ 0.35% Airbnb ABNB 0.34% Datadog DDOG 0.33% Ross Stores ROST 0.33% O'Reilly Automotive ORLY 0.32% Warner Bros Discovery WBD 0.32% Lumentum Holdings LITE 0.30% American Electric Power AEP 0.30% Honeywell International HON 0.30% PACCAR PCAR 0.29% Baker Hughes BKR 0.28% Monolithic Power Systems MPWR 0.27% Diamondback Energy FANG 0.25% NXP Semiconductors NXPI 0.25% Fastenal FAST 0.25% PDD Holdings PDD 0.25% Teradyne TER 0.23% Autodesk ADSK 0.23% Honeywell Aerospace HONA 0.22% Astera Labs ALAB 0.21% Coca-Cola Europacific Partners CCEP 0.21% Xcel Energy XEL 0.21% PayPal Holdings PYPL 0.21% Paychex PAYX 0.20% Exelon EXC 0.20% Nebius Group NBIS 0.20% Keurig Dr Pepper KDP 0.19% IDEXX Laboratories IDXX 0.19% Roper Technologies ROP 0.19% Axon Enterprise AXON 0.19% Ferrovial FER 0.18% Strategy MSTR 0.18% Thomson Reuters TRI 0.18% Take-Two Interactive Software TTWO 0.18% Workday WDAY 0.18% Microchip Technology MCHP 0.17% Old Dominion Freight Line ODFL 0.17% CoreWeave CRWV 0.16% Rocket Lab RKLB 0.16% Dexcom DXCM 0.15% Alnylam Pharmaceuticals ALNY 0.15% GE HealthCare Technologies GEHC 0.14% Kraft Heinz KHC 0.14% Copart CPRT 0.13%

WE HAVE NOW OFFICIALLY COMPLETED 7 OUT OF THE 12 MONTHS IN 2026 This is how every stock in the NASDAQ 100 has performed so far in 2026 Sandisk $SNDK +411.8%🟢 Western Digital $WDC +216.3%🟢 Seagate $STX +210.9%🟢 Micron $MU +188.4%🟢 Intel $INTC +144.4%🟢 Nebius $NBIS +127.5%🟢 AMD $AMD +122.3%🟢 Marvell $MRVL +120.7%🟢 Arm Holdings $ARM +119.3%🟢 Fortinet $FTNT +103.9%🟢 Applied Materials $AMAT +97.5%🟢 Datadog $DDOG +97.1%🟢 Lumentum $LITE +93.7%🟢 Teradyne $TER +90.0%🟢 Astera Labs $ALAB +87.1%🟢 Palo Alto $PANW +80.2%🟢 Lam Research $LRCX +71.2%🟢 CrowdStrike $CRWD +62.9%🟢 Texas Instruments $TXN +58.9%🟢 Monolithic Power $MPWR +57.3%🟢 ASML $ASML +52.3%🟢 Cisco $CSCO +50.6%🟢 KLA Corp $KLAC +50.5%🟢 Ross Stores $ROST +39.4%🟢 CSX $CSX +39.0%🟢 Analog Devices $ADI +35.5%🟢 Old Dominion $ODFL +35.3%🟢 Diamondback Energy $FANG +35.0%🟢 Baker Hughes $BKR +32.8%🟢 DexCom $DXCM +25.7%🟢 Monster Beverage $MNST +25.7%🟢 Starbucks $SBUX +25.0%🟢 PACCAR $PCAR +21.2%🟢 Coca-Cola Europacific $CCEP +20.7%🟢 Marriott $MAR +20.2%🟢 Fastenal $FAST +18.9%🟢 Honeywell $HON +18.9%🟢 Amgen $AMGN +17.7%🟢 Amazon $AMZN +17.7%🟢 Microchip $MCHP +16.6%🟢 Mondelez $MDLZ +15.8%🟢 Google $GOOGL +13.8%🟢 Apple $AAPL +13.6%🟢 Broadcom $AVGO +12.5%🟢 Linde $LIN +12.2%🟢 Airbnb $ABNB +11.6%🟢 Keurig Dr Pepper $KDP +11.1%🟢 American Electric Power $AEP +10.9%🟢 Costco Wholesale $COST +10.4%🟢 Cintas CTAS +8.8%🟢 Cadence CDNS +8.8%🟢 Nvidia NVDA +7.6%🟢 Kraft Heinz KHC +6.6%🟢 Gilead Sciences GILD +6.1%🟢 Xcel Energy XEL +5.9%🟢 NXP Semiconductors NXPI +5.6%🟢 Vertex Pharmaceuticals VRTX +5.2%🟢 Exelon EXC +5.1%🟢 Paychex PAYX +4.2%🟢 ADP +3.6%🟢 Electronic Arts EA +2.7%🟢 Ferrovial FER +0.8%🟢 CoreWeave CRWV +0.2%🟢 Walmart WMT -0.2%🔴 Regeneron Pharmaceuticals REGN -1.2%🔴 PayPal PYPL -2.0%🔴 O'Reilly Automotive ORLY -2.0%🔴 PepsiCo PEP -2.8%🔴 Microsoft MSFT -3.9%🔴 Take-Two TTWO -5.1%🔴 MercadoLibre MELI -6.8%🔴 Rocket Lab RKLB -6.9%🔴 Axon AXON -7.1%🔴 Warner Bros. Discovery WBD -8.7%🔴 Booking BKNG -10.0%🔴 Roper ROP -11.9%🔴 DoorDash DASH -13.4%🔴 Qualcomm QCOM -13.7%🔴 Comcast CMCSA -14.4%🔴 T-Mobile TMUS -14.9%🔴 Meta Platforms META -15.7%🔴 GE HealthCare Technologies GEHC -17.1%🔴 Synopsys SNPS -17.2%🔴 IDEXX IDXX -17.4%🔴 Autodesk ADSK -20.9%🔴 PDD Holdings PDD -21.9%🔴 Netflix NFLX -23.5%🔴 Thomson Reuters TRI -24.5%🔴 Workday WDAY -25.4%🔴 Copart CPRT -25.6%🔴 Constellation Energy CEG -25.6%🔴 Shopify SHOP -27.2%🔴 SpaceX SPCX -27.8%🔴 Adobe ADBE -28.5%🔴 Honeywell Aerospace HONA -30.5%🔴 Palantir PLTR -30.8%🔴 Tesla TSLA -30.8%🔴 Intuitive Surgical ISRG -37.6%🔴 Strategy MSTR -38.6%🔴 AppLovin APP -41.3%🔴 Alnylam Pharmaceuticals ALNY -48.3%🔴 Intuit INTU -52.3%🔴

$RMBS KEY READ-THROUGHS FROM RAMBUS Q3 2026 EARNINGS CALL Rambus’s results strengthen the case that AI infrastructure spending is broadening beyond accelerators into CPU-based servers, conventional memory modules and increasingly complex silicon designs. The most actionable signal is the expected acceleration in product revenue to 34% year-over-year growth in Q4 despite minimal MRDIMM contributions. However, the call also exposes important differences between module demand, memory-bit demand, supplier profitability and actual end consumption. Customers are preserving module counts while reducing module capacity, semiconductor input costs are pressuring Rambus’s margins, and earlier ordering is improving backlog visibility without resolving uncertainty about downstream inventories. The strongest positive implications concern conventional DDR5 interface suppliers, server processors and advanced semiconductor IP. The strongest negative implications concern aggressive MRDIMM adoption assumptions, unconstrained server-DRAM content forecasts and valuations that treat precautionary ordering as equivalent to final demand. Countries below indicate corporate domicile; magnitude refers to the affected business and consolidated earnings exposure, not a forecast share-price movement. MEMORY INTERFACE SEMICONDUCTORS: CONVENTIONAL DDR5 CONTENT EXPANSION IS ALREADY MONETIZING, WITHOUT REQUIRING MRDIMM (READ-THROUGH 1) Affected companies: Montage Technology (688008: China) and Renesas Electronics (6723: Japan). Direction: positive. Magnitude: high strategic relevance for Montage’s concentrated interconnect business; meaningful for Renesas’s memory-interface operations but more diluted at the consolidated level. The critical evidence is Rambus’s expectation of approximately $130 million in Q4 product revenue, up 34% year-over-year, with management attributing the growth primarily to existing RCD generations and companion chips. Seraphin described the outlook as “34% year-over-year growth based on the core, I would say, RCD and companionships.” MRDIMM remains “very modest.” This is evidence that the conventional memory-interface opportunity is generating substantial revenue before the more speculative architectural transitions become material. The transmission mechanism is a combination of more populated memory modules, higher-speed RCD generations and increased supporting-chip content. Management highlighted the progression from 8 to 12 to 16 memory channels. A move from 12 to 16 channels increases potential channel count by 33%, although realized module demand depends on population rates and platform mix. RCDs, power-management devices, SPD hubs and temperature sensors can benefit from this expansion without requiring proportional growth in DRAM capacity per module. Renesas’s disclosed portfolio spans these categories, while Montage’s operating exposure is heavily concentrated in interconnect chips. Montage provides unusually strong independent corroboration. Its October 20 preliminary announcement projected Q3 interconnect-chip revenue growth of approximately 49%, identified higher shipments of DDR5 interface and supporting chips, and anticipated further demand growth in Q4. Interconnect chips represented approximately 98% of its preliminary quarterly revenue, although that category is broader than RCDs alone. Rambus therefore confirms an already-disclosed industry expansion rather than providing the initial evidence for a Montage earnings surprise. The margin comparison is particularly important. Rambus attributed its approximately 60.4% product margin primarily to supplier-cost pressure, while Montage projected an interconnect gross margin of 68.0% to 68.5%, improving both sequentially and year-over-year. Product mixes and accounting definitions differ, so the figures are not a clean competitiveness comparison. Nevertheless, they demonstrate that Rambus’s margin pressure should not automatically be extrapolated across the entire interface-chip group. The near-term catalyst is Q4 shipment conversion and the next disclosures on higher-generation RCD mix and companion-chip adoption. The longer-duration driver is rising interface content per server as platforms add channels and memory speeds increase. The cross-portfolio implication is favorable for qualified interface suppliers across China, Japan and the US, but the call does not establish regional share shifts or identify a beneficiary of any specific customer allocation. MEMORY INTERFACE SEMICONDUCTORS: MRDIMM ADOPTION SHOULD BE MODELED MORE CONSERVATIVELY THAN THE ADDRESSABLE-MARKET NARRATIVE (READ-THROUGH 2) Affected companies: Renesas Electronics (6723: Japan), Montage Technology (688008: China) and Micron Technology (MU: US). Direction: negative for aggressive adoption and product-mix assumptions. Magnitude: moderate for MRDIMM-specific revenue expectations; limited for immediate consolidated earnings where current contributions remain small. Management’s clearest qualification was that “the ramp will be shallower in our opinion than the other generations of products.” The reasons were platform-specific introductions, uncertainty about the proportion of systems adopting MRDIMM rather than conventional DIMMs, customer qualification requirements and unfavorable memory economics. Rambus’s strong Q4 growth explicitly does not require a substantial MRDIMM contribution. The transmission mechanism is delayed monetization of richer module content. MRDIMM introduces multiplexing and additional buffering functionality, creating opportunities for higher interface-chip revenue and differentiated high-bandwidth memory products. However, suppliers realize that opportunity only when compatible processors ship, system vendors qualify the configurations and customers select MRDIMM over conventional alternatives. A large addressable market cannot substitute for those adoption steps. Renesas has direct exposure through its MRCD and multiplexed data-buffer portfolio, alongside supporting PMICs and other module components. Its July announcement placed production availability for its third-generation MRDIMM chipset in H2 2027. Rambus’s commentary does not contradict that schedule or establish a delay to Renesas’s announced plan. It does reduce confidence in scenarios that assume rapid, broad-based adoption across platforms before customer economics and qualifications are established. For Montage, the implication is to separate the already-strong conventional DDR5 franchise from incremental MRDIMM upside. For Micron, it argues for caution around the timing of premium server-module mix benefits rather than a reduction in aggregate memory demand. Revenue can remain strong in conventional modules while the richer architecture develops more slowly. The competitive question is unresolved. An analyst noted that a competitor had secured the initial MRDIMM platform, but Rambus’s response emphasized market timing rather than demonstrating that it had displaced that supplier. Consequently, the call provides no basis for assuming an immediate competitive loss at Renesas or Montage. Equally, early participation in a platform does not guarantee that the entire market will adopt MRDIMM rapidly. The near-term trading implication is reduced justification for capitalizing a steep MRDIMM ramp into 2027 estimates without shipment evidence. The longer-duration opportunity remains intact. Relevant catalysts are production qualifications, disclosed module shipments and actual adoption across successive CPU platforms during 2027. This is a timing caution, not evidence of canceled platforms or a formal reduction to peer guidance. DRAM PRODUCERS: MODULE GROWTH IS NOT MEMORY-BIT GROWTH, AND HIGH PRICES ARE ALREADY CHANGING CONFIGURATIONS (READ-THROUGH 3) Affected companies: Micron Technology (MU: US), SK hynix (000660: South Korea) and Samsung Electronics (005930: South Korea). Direction: negative for unconstrained conventional server-DRAM content assumptions, while near-term pricing can remain positive. Magnitude: potentially meaningful within server DRAM, but not sufficient to establish a consolidated earnings downgrade. The most important quotation is: “it’s not that people decrease the number of modules, but they tend to decrease the capacity of each one of these modules.” Management attributed that behavior to memory economics. This is a direct indication that customers are protecting bandwidth-oriented configurations while reducing capacity to manage system cost. The transmission mechanism differs materially between interface-chip suppliers and DRAM producers. Interface-chip demand is substantially linked to the number and configuration of modules. DRAM-bit demand also depends on capacity per module. More modules can therefore support strong RCD shipments while generating much less memory-bit growth. Illustratively, 20% growth in modules combined with a 15% reduction in average capacity produces only 2% growth in installed bits. Those percentages are a sensitivity, not an estimate of the observed market. This is not a high-conviction outright bearish call on memory earnings. Lower capacity growth can coexist with strong pricing, richer product mix and rising profitability when supply remains constrained. The read-through is specifically negative for models that simultaneously assume unrestricted bit-content growth, rapidly rising prices and no customer adaptation. It also should not be transferred to HBM, whose configurations and demand drivers differ from conventional CPU-attached memory. The novelty is limited but useful. Micron’s September earnings call had already described strong server-unit growth accompanied by a modestly lower rate of content growth than previously expected because of tight memory supply. Rambus provides independent, module-level corroboration of that adjustment. It is therefore stronger evidence for the mechanism, not a newly discovered reason to cut Micron’s already-reported quarter. Near-term catalysts are SK hynix’s October 28 results and Samsung’s October 29 earnings discussion, particularly their commentary on conventional DRAM shipments, server configurations and pricing. Samsung’s preliminary profit guidance is already public; the incremental information is the underlying volume, mix and outlook discussion. For Micron, the relevant catalyst is the next update to fiscal 2027 shipments and content assumptions. The longer-duration implication is that memory spending and useful installed capacity may diverge materially during a tight supply cycle. Across a portfolio, interface-chip strength should not be treated as an interchangeable confirmation of DRAM-bit growth. Conversely, lower capacity per module should not be interpreted as evidence that server deployments or AI infrastructure investment are collapsing. SERVER PROCESSORS: AGENTIC AI IS EXPANDING CPU-ATTACHED MEMORY DEMAND RATHER THAN SIMPLY REPLACING CPU INFRASTRUCTURE (READ-THROUGH 4) Affected companies: Advanced Micro Devices (AMD: US) and Intel (INTC: US). Direction: positive. Magnitude: meaningful for EPYC and Xeon demand; moderate incremental consolidated read-through because pricing, market share, supply and other businesses remain important. Rambus identified orchestration, persistent workloads, tools management and memory management as drivers of higher CPU requirements. Seraphin stated that “the majority of the growth is coming from CPUs with, with standard memory subsystems.” He also described the CPU-to-GPU ratio as moving in Rambus’s favor. The transmission mechanism is additional CPU-based infrastructure around accelerated workloads. Agent execution requires coordination, data preparation, application logic and access to memory outside the accelerator’s local HBM. Those requirements can increase CPU deployments and favor platforms with greater memory bandwidth, more channels and stronger performance under memory-intensive workloads. AMD and Intel monetize the processor demand; their qualified memory ecosystems help determine how quickly that demand becomes deployed systems. The distinction between head nodes and the broader CPU estate is important. Rambus characterized LPDDR-based configurations as a smaller portion of the market and conventional DIMMs as the dominant source of growth. This weakens the assumption that growth in specialized accelerator-associated CPU configurations necessarily displaces the broader conventional server opportunity. However, standard DDR memory is not exclusive to x86. The call supports the end market served by EPYC and Xeon; it does not establish that Arm-based server processors are losing share. Nor does it establish an AMD-versus-Intel share outcome. Rambus’s 34% product-growth outlook also cannot be translated into 34% CPU shipment growth because memory channels, chip content and supplier share contribute to its revenue. The signal corroborates existing company commentary. AMD’s August release described accelerating EPYC demand, while Intel’s July release reported strong Data Center and AI growth and highlighted agentic infrastructure deployments. Rambus adds a later observation from the memory subsystem, strengthening confidence that the CPU opportunity is supported by actual platform requirements rather than only processor-vendor positioning. The most immediate catalysts are Intel’s October 29 earnings and AMD’s November 3 earnings. The key variables are CPU demand, shipment capacity and the 2027 outlook, rather than headline data-center revenue alone. AMD’s data-center business also contains accelerators, while Intel’s consolidated outcome includes foundry and other exposures. Over the longer term, the structural positive is a broader CPU workload base; the limiting factors are utilization improvements, workload consolidation and offload to other processors. ENTERPRISE SERVER HARDWARE: PHYSICAL MEMORY-SUBSYSTEM DEMAND SUPPORTS THE REFRESH CYCLE, BUT DOES NOT VALIDATE HEADLINE REVENUE GROWTH AS UNIT GROWTH (READ-THROUGH 5) Affected companies: Dell Technologies (DELL: US) and Hewlett Packard Enterprise (HPE: US). Direction: positive for conventional server demand, with important limits on revenue and margin extrapolation. Magnitude: moderate at the server-business level and more diluted at the consolidated level. The supporting commentary is Rambus’s observation that module counts are increasing even as capacity per module declines, combined with its expectation that conventional CPU systems will generate most of the growth. These are physical configuration signals, not merely higher dollar spending on memory. The transmission mechanism is demand for complete CPU-based systems used in enterprise refreshes, orchestration and inference-related infrastructure. Dell and HPE can monetize that demand through servers, configuration options, support and related infrastructure. Their exposure is downstream through the server ecosystem; Rambus did not identify either company as the recipient of a particular order or establish a direct customer relationship. The non-consensus distinction is between genuine infrastructure demand and the magnitude of reported dollar growth. Rambus’s evidence makes an explanation based entirely on memory-price inflation less persuasive. Nevertheless, higher channel counts can increase modules per server without an equivalent increase in server units. The call therefore supports physical infrastructure activity but cannot independently establish OEM unit growth. This distinction matters against already-reported results. Dell’s September release showed traditional servers and networking revenue increasing 122% year-over-year. HPE also reported strong server growth, and its earnings discussion identified both robust demand and supply constraints. Rambus corroborates the market direction, but provides no basis for applying its own growth rate to those companies or treating their revenue increases as shipment increases. Margin transmission is also conditional. Higher memory prices can be passed through, absorbed or managed through configuration changes and procurement arrangements. HPE’s recent profitability improvement demonstrates why a blanket conclusion that memory inflation must compress OEM margins would be incorrect. Conversely, continued supply tightness can delay shipments and increase working-capital requirements even when pricing is effective. The near-term catalysts are the upcoming results covering the October 2026 fiscal quarters, especially unit commentary, traditional-server order conversion, gross profit per system and component availability. The longer-duration positive is a broader role for conventional servers within AI-enabled enterprise infrastructure. The principal cross-portfolio risk is that OEM dollar growth, component shipments and end-system deployment are different measures and should not be counted as independent confirmations of the same growth rate. SEMICONDUCTOR IP AND DESIGN SOFTWARE: CUSTOM SILICON CREATES EARLIER MONETIZATION OPPORTUNITIES THAN PRODUCTION CHIP SHIPMENTS (READ-THROUGH 6) Affected companies: Synopsys (SNPS: US) and Cadence Design Systems (CDNS: US). Direction: positive. Magnitude: meaningful for advanced interface and memory IP; modest to moderate at the consolidated level because these are broader businesses and competitive allocation remains unknown. Rambus reported additional Tier 1 next-generation HBM design wins, increasing interest in PCIe controller and switch IP, and deeper architectural engagement before standards are finalized. Management described customers as “designing increasingly differentiated architectures and tailored silicon optimized for their own environments.” The CFO placed silicon IP growth toward the upper end of the previously communicated 10% to 15% range. The transmission mechanism is increased demand for validated design building blocks and verification as customers develop more complex custom systems. HBM interfaces, high-speed connectivity, security and integration must be addressed before a chip can reach production. Synopsys and Cadence have direct product exposure to these requirements, rather than merely sharing a broad AI label. The timing advantage is important. IP licenses and associated engineering activity can monetize during design, before the customer’s finished chip reaches meaningful shipment volume. Design spending can therefore remain strong even while system adoption is constrained by memory supply or platform qualifications. However, licensing terms differ, and design wins should not automatically be treated as recurring royalties on every future chip shipment. The opportunity is reinforced by previously disclosed peer performance. Synopsys’s August results described a return to year-over-year growth in Design IP and specifically identified memory-interface, wired-interface and security IP within the business. Cadence released its Q3 results on October 26, reporting strong double-digit growth across product categories and record backlog. Rambus is consequently corroborating an established design-demand cycle, not predicting Cadence’s already-announced quarter. There are clear limits to the read-through. Rambus’s wins could represent competitive displacement in individual programs, so they do not establish that Synopsys or Cadence won the same business. The 35% growth in Rambus’s contract-and-other line is also not an appropriate growth assumption for the entire IP industry, since Rambus’s IP revenue spans multiple accounting categories. The near-term catalysts are Synopsys’s fiscal Q4 results and subsequent 2027 outlooks, with emphasis on IP bookings, program breadth and integration intensity. The longer-duration positive is greater engineering content per custom system. Rambus’s ChipAgents collaboration does not establish displacement of incumbent EDA tools or a quantified reduction in industry design spending; neither conclusion deserves financial credit from this call. CROSS-PORTFOLIO SUPPLY-CHAIN RISK: EARLIER ORDERING IMPROVES PLANNING BUT DOES NOT PROVE STRONGER FINAL CONSUMPTION (READ-THROUGH 7) Affected companies: Rambus (RMBS: US), Montage Technology (688008: China) and Renesas Electronics (6723: Japan). Direction: negative for the evidentiary quality of backlog-based growth assumptions, not evidence of an imminent demand decline. Magnitude: moderate for visibility and valuation; potentially more material for focused interface-chip suppliers if ordering later normalizes. The decisive exchange concerned downstream inventories. Management acknowledged, “It’s very hard to determine,” before explaining that customers are placing orders earlier. Seraphin summarized the distinction as: “we don’t see people building inventory, but we see people placing backlog.” That is narrower than confirmation that downstream inventories are lean. The transmission mechanism is a change in order timing. Customers responding to longer supplier lead times can extend procurement horizons without increasing the same proportion of final consumption. Suppliers then see stronger backlog and may build inventory or reserve capacity. If customers subsequently shorten those horizons, bookings can weaken even while underlying end demand remains healthy. Precautionary ordering can therefore amplify both the apparent upturn and a later normalization. Rambus’s own actions illustrate the balance-sheet consequence. Inventory increased approximately $12 million during Q3, another increase is planned for Q4, and management is using liquidity to protect supply. This strategy has worked operationally: management stated that supplier constraints did not affect Q3 or the Q4 outlook. The negative read-through is therefore not a reason to assume an immediate supply-driven miss. It is a reason to distinguish current execution from the durability of the visible order book. The risk cannot be transferred mechanically across suppliers. Contract terms, cancellation provisions, customer deposits, product breadth and inventory ownership differ. In particular, memory producers’ disclosed longer-term supply commitments should not be treated as equivalent to Rambus’s unspecified product backlog. Nor does Rambus’s limited visibility prove that Montage or Renesas has the same customer behavior. The near-term catalyst is the Q4-to-H1 2027 transition, when seasonal patterns, inventory coverage and earlier orders begin to interact. Shipment conversion, cancellations and inventory efficiency will be more informative than backlog growth alone. Over the longer term, suppliers that can maintain availability without excessive inventory commitments should earn better returns on capital. The cross-portfolio implication is to avoid counting stronger CPU demand, higher module shipments and longer component backlogs as 3 fully independent signals when they can reflect different stages of the same procurement cycle.

SNP's Kirsty Blackman asks Burnham why there shouldn't be IndyRef2 now. He replies: "Well I'm sure like me she will look at opinion polls in all parts of the country, including Scotland, and can I just say Mr Speaker, no one is in the house today proposing a referendum."