Karim Mattar(@MattarARK):$875M into Positron at ~$5B for Asimov - inference silicon built around LPDDR5X instead of HBM, with per-chip memory up into the TB class and a TSMC 3nm tapeout aimed at late 2026. The mechanism isn't "another AI chip." It's betting the serving bottleneck is memory bandwidth and HBM queue risk, so mobile DRAM + custom servers can undercut the HBM tax. Falsifier: if HBM supply loosens faster than Asimov ships, the LPDDR detour looks cute. If HBM stays tight into 27, memory-first is the real inference bid.

2026.09.17 20:00

$875M into Positron at ~$5B for Asimov - inference silicon built around LPDDR5X instead of HBM, with per-chip memory up into the TB class and a TSMC 3nm tapeout aimed at late 2026. The mechanism isn't "another AI chip." It's betting the serving bottleneck is memory bandwidth and HBM queue risk, so mobile DRAM + custom servers can undercut the HBM tax. Falsifier: if HBM supply loosens faster than Asimov ships, the LPDDR detour looks cute. If HBM stays tight into 27, memory-first is the real inference bid.

NEA@NEA

2026.09.16 15:16

NEA recently led @positron_ai's $875M Series C — now @NeehaarGandhi @psikryan @lilatretikov @ScottDSandell & Forest Baskett are sharing why we think this is the next architectural reset for AI. ⚠️ AI just hit a trillion-dollar traffic jam — and it's not compute that's stuck, it's memory and networking. We think we found the company built to fix it. ⚡ Meet Asimov: a chip that ditches the switch entirely, links 16,000+ chips directly, and crams in more memory than anything else on the market. No HBM. No CoWoS. No bottleneck. 🚀 5x the tokens per dollar. A fraction of the power. And the its first-gen system already live.