$TER $FORM $AEHR Schulz Class #12#: yield, or why chips get tested before they're put together Class #11# ended on one rule: every optical engine has to be known good before it's sealed next to the switch chip. The reason is plain arithmetic. If each part is 99% good and a package needs all 16 of its parts to work, only about 85% of packages come out whole. At 95% per part, it's 44%. What it is Think of baking cookies for gift boxes. Every tray has a few burnt ones, and the share you can actually sell is your yield. Pack the boxes first and check later, and one burnt cookie spoils a whole box. So you check each cookie before it goes in. In chips, yield is the share of chips that work out of all the chips made. Testing is how a factory finds out which ones those are. It happens at least twice. On the wafer, a probe card presses tiny needles onto each chip while a machine called a tester sends signals in and reads them back. After packaging, the tester checks the finished part again. Why it matters AI chips are built from many pieces, so the losses multiply. The 16-layer HBM stack from Class #4# runs on the same math as the first chart: one bad layer ruins the stack, and if that stack gets packaged next to a GPU, the GPU goes in the bin with it. That's why memory makers test each layer on the wafer and only stack the ones that pass. The test makers' results show how much more testing AI needs. Teradyne's revenue rose 70% from a year earlier to $1.31B in the September quarter, with record memory test revenue that it credits to AI. FormFactor posted its fourth record quarter in a row at $280.5M, up 38%, and said its existing factories are nearing their capacity limit. What it means for stocks Teradyne makes testers, the machines that run the checks. Japan's Advantest (6857 JT) is its biggest rival. FormFactor makes the probe cards that connect a tester to the chips on a wafer, and it said co-packaged optics demand lifted its systems revenue by more than 20% from the previous quarter. The more pieces go into one package, the more each piece has to be tested before it goes in. One kind of test does more than check whether a chip works today. It runs chips hot for hours to catch the ones that would fail early. That's burn-in, the next class. We first ran this 16-part math on co-packaged optics switches in our optical test series. What would you like the next class to explain?