Hana Securities: CXMT completed the transition to its fourth-generation process, roughly equivalent to the 16nm node, at Beijing Fab 1 in 2Q26. Yields are estimated to have exceeded 90%. Its DDR5 products currently support speeds of up to 5,600MHz, with plans to expand to 6,400MHz going forward. However, due to its reliance on multi-patterning, CXMT requires more process steps and therefore still lags leading memory manufacturers in areas such as bit output per wafer and manufacturing cost. For HBM, CXMT is targeting mass production of 12-high HBM3E in 2027. If the company is able to produce approximately 3–4 million HBM3E stacks in 2027, this could be sufficient to materially ease one of the key bottlenecks for AI GPUs in China.