CXMT plans to introduce DDR5 server memory modules based on its new 4F² DRAM architecture by year-end 2026, STAR Market Daily reported on Oct. 10.
The design uses vertical transistors to reduce the footprint of each memory cell. At the same feature size, it could pack more memory into a given chip area than a conventional 6F² design.
CXMT did not disclose product specifications or an exact launch date, according to the report. The article also provides no yield or shipment-volume data, making it difficult to assess the scale and economics of production.