I recorded a video on my DIY gene gun efforts. Still lots of work to do dialing things in, but it might be some time before I get to that so I figured I should share the process in the meantime :) Video: Examples of transformed cells:

Resonac (TSE: 4004) and Intel ($INTC) are building a panel the same size. Not a similar size. The same number. Resonac's APLIC line in Ibaraki runs 510x515mm and makes organic interposers of 8 to 12 reticles. Intel presented a glass core panel at ECTC this year. 510x515mm, 24 layers. Same rectangle, different material. So the material is not settling first. The format is. Why a panel at all. Resonac's own February deck answers it, and the answer is a size problem. Its estimate has package interposers growing more than 80% by 2030, from 70x80mm today toward 100x100mm. And 8 to 12 reticles works out to roughly 83x83mm up to 101x101mm. The equipment slide and the market slide are describing the same object. Meanwhile the wafer does not grow. It has been 300mm for over two decades. That is the argument. A 510x515mm panel is 262,650 mm2 against 70,686 for a 300mm wafer. About 3.7 times the area in one pass. A Resonac fellow put the reason in a physics journal last year, and it is not a performance argument. A wafer leaves the front end worth 300,000 to 500,000 yen. Then it gets diced, and back end materials are applied to chips worth 300 to 500 yen each. The back end lost the batch and has been shaving cost ever since. One more number lines up. The same deck has substrate layer count rising 15 to 20% from 20 to 22 layers, which lands between 23 and 26. Intel's glass panel has 24. So glass is not the story. Glass is one of two answers to a story about batch size, and Intel is building to a range a Japanese materials company published in February. Being fair: those growth figures are Resonac's own estimates and the slide says so. The fellow works for the company building the organic line. His margin figures are 2021 to 2023 peaks. What would change my read: if the two panels stop converging. If Intel's glass moves to 600mm square, the format is not settled and the material fight has not started. Sources, in order: Resonac Holdings, Phase 2 strategy presentation, 13 February 2026, pages 13, 18 and 19. Intel, ECTC 2026. Seiichi Kondo, Resonac fellow, Oyo Buturi volume 94 number 6, 2025. My read, not advice. The area ratio and the reticle arithmetic are mine.

Three companies published the same cost target. NVIDIA ($NVDA) wants co-packaged optics under 1.5 picojoules per bit. IBM ($IBM) is going for under 1. Intel ($INTC) is targeting under 5 across the package, end to end. Different numbers, because the engineering is different. Then all three name the same cost. 0.1 dollars per gigabit per second. Power targets diverge because the physics diverges. A cost target that lands on the same figure three times did not come up from the engineering. It came down from the customer. Which would be fine, except for what the customer cannot do. The director who set up Resonac's (TSE: 4004) US-JOINT consortium in Silicon Valley told Nikkei that hyperscalers and fabless companies are strong at simulation, but there are few environments where you can verify an actual semiconductor package. So the people setting the number cannot test against it. On the manufacturing side, the same week's coverage says who bears final responsibility for quality assurance is still an open question. Foundries and OSATs are not used to volume optical production, and the division of labour has not been agreed. The instruments exist. Keysight ($KEYS) announced a 220 GHz lightwave component analyzer on 12 March and showed it at OFC. The measurement is possible. The signature is not assigned. Here is why that matters more than it sounds. Both failure modes in this stack are local, not average. A fiber core and a waveguide differ in cross section by roughly 800 times, so a misalignment at nanometre scale becomes a coupling loss you cannot average away. On the thermal side a chip can run cool on average and still fail from one hot spot. Resonac buys test chips from imec that reproduce over 1000 watts and can heat a single region of the die. Testing that used to pass on averages now has to catch the local case. That means more test time per part, on parts that are already singulated. The back end already had the thinnest margins in the industry. So the layer that gets paid here is not the one making the optics. It is the one deciding whether they passed. Advantest (TSE: 6857) and Teradyne ($TER) are the duopoly in that seat. Keysight sits beside it. One more line, because the geography is odd. Resonac partnered with Purdue in May for thermal analysis. SK hynix (KRX: 000660) is putting 3.87 billion dollars into an advanced packaging site on land held by a Purdue-affiliated foundation in Indiana. A Japanese materials company and a Korean memory maker are working at the same university. Where a responsibility gap sits open, someone eventually charges a toll to close it. What would change my read: if a foundry or an OSAT publicly takes final sign-off on CPO. Then this stops being an open seat. Sources, in order: Nikkei xTECH, 17 August 2026, two articles. Keysight press release, 12 March 2026. Nikkei BP, book on optoelectronic fusion, industry map section. My read, not advice.

Some updates on bottleneck timelines: - ABF substrates: 1 year / eg. Ajinomoto (2802) for ABF film, Ibiden, Unimicron, Nan Ya PCB, etc make the substrates - HDI Boards: Over 6 months / Victory Giant (300476), Zhen Ding (4958), Unimicron, Compeq (2313), Meiko (6787) - Multilayer boards: ~6 months / Victory Giant, WUS (002463), $TTMI, Gold Circuit Electronics (2368), - CCL: Over 6 months (severe shortages of materials) / Elite Material (2383), Shengyi (600183), TUC (6274), ITEQ (6213), Nan Ya Plastics (1303), Resonac (4004) Mitsui Kinzoku (5706) / HVLP copper foil. Nittobo / glass fiber/cloth - MLCCs, chip resistors, tantalum capacitors, aluminum electrolytic capacitors: 15-20 weeks to 1 year+ MLCC: Murata (6981), Samsung Electro-Mechanics, TDK (6762), Taiyo Yuden (6976), Yageo (2327), Walsin (2492) Chip Resistors: Yageo, Walsin, KOA (6999), Rohm (6963) and $VSH Tantalum capacitors: Kyocera/AVX, Yageo/KEMET, $VSH again Aluminum electrolytic capacitors: Nippon Chemi-Con (6997) Nichicon (6996) | Timelines sourced from Digitimes, did the honors of adding in related companies. But it's slightly more nuanced since MLCCs and others mix. in commodity types vs. AI DCs. Regardless, just some helpful mapping.