At IEEE ECTC 2025, #NVIDIA# proposed replacing polarization-maintaining fiber (PMF) with single-mode fiber (SMF) by integrating an active polarization tracking circuit directly into the silicon photonics (SiPh PIC) chip. The system dynamically stabilizes the optical signal’s state of polarization in real time. Although insertion loss and power consumption increase, the approach significantly reduces cost and improves supply chain flexibility, making it more suitable for large-scale AI data center deployments.

$INTC Looks like great progress in the Glass Core Substrate presentation at ECTC: -Void-free, copper TGVs -Crack-free after 50 cycles of thermal shock -Panel scale processing -SeWaRe free cutting glass units *From LinkedIn

Resonac (TSE: 4004) and Intel ($INTC) are building a panel the same size. Not a similar size. The same number. Resonac's APLIC line in Ibaraki runs 510x515mm and makes organic interposers of 8 to 12 reticles. Intel presented a glass core panel at ECTC this year. 510x515mm, 24 layers. Same rectangle, different material. So the material is not settling first. The format is. Why a panel at all. Resonac's own February deck answers it, and the answer is a size problem. Its estimate has package interposers growing more than 80% by 2030, from 70x80mm today toward 100x100mm. And 8 to 12 reticles works out to roughly 83x83mm up to 101x101mm. The equipment slide and the market slide are describing the same object. Meanwhile the wafer does not grow. It has been 300mm for over two decades. That is the argument. A 510x515mm panel is 262,650 mm2 against 70,686 for a 300mm wafer. About 3.7 times the area in one pass. A Resonac fellow put the reason in a physics journal last year, and it is not a performance argument. A wafer leaves the front end worth 300,000 to 500,000 yen. Then it gets diced, and back end materials are applied to chips worth 300 to 500 yen each. The back end lost the batch and has been shaving cost ever since. One more number lines up. The same deck has substrate layer count rising 15 to 20% from 20 to 22 layers, which lands between 23 and 26. Intel's glass panel has 24. So glass is not the story. Glass is one of two answers to a story about batch size, and Intel is building to a range a Japanese materials company published in February. Being fair: those growth figures are Resonac's own estimates and the slide says so. The fellow works for the company building the organic line. His margin figures are 2021 to 2023 peaks. What would change my read: if the two panels stop converging. If Intel's glass moves to 600mm square, the format is not settled and the material fight has not started. Sources, in order: Resonac Holdings, Phase 2 strategy presentation, 13 February 2026, pages 13, 18 and 19. Intel, ECTC 2026. Seiichi Kondo, Resonac fellow, Oyo Buturi volume 94 number 6, 2025. My read, not advice. The area ratio and the reticle arithmetic are mine.

Explore the latest Intel Foundry innovations, from Intel 18A-P platform momentum at VLSI and AI systems showcased at Computex to advanced packaging breakthroughs from ECTC. Plus, dive into the updated Intel 18A family brief and the latest ecosystem milestones helping advance next-generation AI. Discover the latest advancements in this edition of Intel Foundry Focus: #IntelFoundry#