Breaking down TSMC's glass core substrate slide On June 11, at JPCA Show 2026 in Japan, TSMC gave a roughly 40-slide presentation titled "Advanced Packaging Technology Essential to the Evolution of AI" (AIの進化に不可欠な先端パッケージング技術). One slide from the deck, titled "Glass Substrate Development for CoWoS," has since leaked online and widespread attention. Here's a closer read of that slide (see attached image). I'll skip the technical background that is already widely available. One thing to flag: the "COP" on the slide does not stand for Chip-on-Package. It means Coplanarity. ▌ Key conclusions: 1. TSMC has officially announced a partnership with Ibiden and Innolux to develop a glass core substrate. The structure is a three-layer design, a glass core sandwiched between two ABF build-up layers. This is the "oS" in CoPoS. 2. The market underestimates how important the glass core substrate is. It's a must-have capability for TSMC. In other words, within CoPoS the "oS" matters more than the "CoP", which is also why, when it was tested, it was paired with the existing CoW rather than with CoP. 3. The glass core substrate costs several times more per unit than existing ABF substrates. The glass processed by Innolux is very expensive per unit and is the single most critical material. Besides Nvidia, two US-based customers have also expressed strong interest. ▌ Industry checks tied to this slide: 1. The glass core substrate shown on the slide is cut from a full-size 250×250mm one. The ABF build-up layers mainly use Ajinomoto's GL107, mixed with ABF-GCP, and were tested at 24–28 layers, which is the mainstream ABF spec for AI chips in 2027–2028. 2. The CoW used in TSMC's experiment is a test vehicle. It is sufficient to validate the most challenging mechanical-structure issues that arise when working with composite materials. Good results mean TSMC, Ibiden, and Innolux have together broken through the critical technical bottleneck. 3. Ibiden currently handles cutting the 250×250mm glass core substrate. When the 510×515mm format is used for pre-mass-production simulation in 2H27, if Ibiden still wants to reduce production complexity to protect its ultra-high gross margins, it may hand the cutting over to Innolux, which is more familiar with the properties of glass. ▌ The leaked slide shows the validation results of pairing CoW with the "oS" in CoPoS, i.e., the glass core substrate (labeled "glass-SBT" on the slide). This addresses the "Substrate mechanical and electrical Dilemma" raised on the previous slide, and it strongly underscores how important the "oS" is within CoPoS. 1. Within CoPoS, what CoP solves is production efficiency / cutting economics, which ties to cost and price. What the oS solves is warpage and durability, which determines whether the chip can be made at all, and whether it can work. 2. CoP and oS complement each other well when integrated, but looking out over the next few years their technical roles still differ. CoP is a very-nice-to-have optimization, and going without it simply means a more expensive chip. But the oS is a must-have. Without it, even being able to make a usable chip is in doubt. 3. Comparing their roles isn't about elevating oS at the expense of CoP. It comes down to the practical question of which technical piece customers are willing to pay for. Details below. ▌ The real gold here is the power integrity (PI) improvement shown on the slide. This matters a great deal to customers, and it means that once glass core substrate production stabilizes, TSMC's profitability and competitive edge should rise in tandem. 1. How it works: the glass core substrate is thin → the vertical conduction path through TGV (through-glass vias) is short → conduction-path resistance (R) and loop inductance (L) both drop → PI improves. 2. Why it matters to customers: better PI → more stable power delivery → frees up power headroom → room to integrate more transistors, or to push clock speeds higher → more AI compute. 3. For customers, production efficiency is TSMC's basic responsibility, so they won't pay extra for it. But gains in AI compute translate directly into the customer's own competitiveness and profit, so customers are willing to pay for that. This is why Nvidia is so positive on the glass core substrate. 4. For TSMC, the glass core substrate raises yield and lowers cost while also boosting both the compute and the selling price of AI chips. It's both a cost-cutting tool and a pricing lever, a plus for profitability and competitiveness alike. 5. Substrate cost currently accounts for a low single-digit percentage of an AI chip's BOM, while losses from packaging yield run roughly 5–10× the substrate cost. So even if the glass core substrate ends up costing several times more than today's, its share of the BOM stays low, and it can cut the losses from packaging yield. The high unit price is therefore not expected to dampen customers' willingness to adopt it. ▌ In the Q&A after the presentation, an audience member asked about TGV details for the glass core substrate. TSMC declined to answer on the spot, because TGV is the key technology behind the glass core substrate, and the core know-how currently sits with TSMC and Innolux. By contrast, when another attendee asked about integrating IVR, eDTC, and LSI, TSMC answered at length. ▌ According to industry checks, if all goes well, TSMC is aiming to start mass production of the glass core substrate in 4Q28–1Q29, to match the cadence of Nvidia's AI chip iterations. As a side note: the Ibiden earnings presentation slide that many people have been circulating lists the glass core substrate timeline as CY30. My read is this: Ibiden, which has always been conservative and cautious in public, has now formally put the glass core substrate on its roadmap, which further confirms the long-term trend for this technology. That said, some other details on Ibiden's slide don't fully line up with what's known in the market. For example, its reticle timeline is off from TSMC's public claims by about a generation, and the Rubin Ultra substrate size is clearly larger than the 90×90 it marked for CY26–27. It's a reminder to always cross-check across multiple sources when forecasting the future.

My latest supply-chain surveys indicate that Carl Zeiss SMT will significantly expand its EUV and higher-ASP immersion DUV optical system capacity by 20-25% YoY and 40-50% YoY, respectively, in 2027 to meet robust demand from ASML. Coupled with stronger-than-expected shipment outlooks for 2026, ASML's revenue is projected to reach €38–40bn in 2026 and €45–47bn in 2027, outperforming market consensus of ~€34–36bn and ~€41–43bn. Key drivers behind the upside vs. consensus are as follows: 1. 2026 Growth Drivers: ➢ EUV and DUV shipments are estimated at 67 and 355 units, surpassing consensus of 53–55 and 310–320 units. ➢ Driven by strong 2nm demand, TSMC has upwardly revised its 2026 EUV orders twice: from an initial 22 units to 25 units last October, and currently to 28 units. ➢ To capture robust demand from Chinese memory makers, ASML plans to launch a new immersion DUV model NXT:1965i in 4Q26. As a down-spec version of the 1980i series, it complies with U.S. export controls while addressing Chinese clients' needs, serving as a key growth driver for 4Q26 and 2027. 2. 2027 Growth Drivers: ➢ 2027 capacity for both EUV and immersion DUV is currently fully booked thanks to the strong demand; further shipment upside will hinge on ASML’s supply-side improvements. ➢ Based on Zeiss SMT’s expansion, ASML’s 2027 shipments are projected to reach 80–85 EUV systems and 380–400 DUV systems. ➢ Boosted by the new 1965i launch, China’s procurement of high-ASP immersion DUV is expected to grow ~40% YoY in 2027. 3. Additional Upside Potential to Monitor: ➢ Potential ASP hikes for EUV and DUV systems amid prolonged supply tightness. ➢ Ongoing upward revisions for the new 1965i model from Chinese memory suppliers. ➢ Potential Intel Upside: The above estimates exclude incremental EUV demand from Intel. Although Intel has not officially placed orders (explaining its previously lower-than-expected Capex guidance), it has entered discussions with ASML for additional bookings. Intel's incremental EUV demand is projected at 20–30 systems over 2026–2027, of which 3–5 are High-NA EUV.

My latest industry checks indicate that Amazon’s processor procurement strategy for its own consumer electronics is set to undergo its first major shift in 20 years: moving away from externally sourced processors and adopting a COT (customer-owned tooling) model, with Alchip as the exclusive provider of back-end design and testing for its self-developed chips. Key points: 1. Amid the rapid expansion of AI compute, Amazon’s free cash flow for the 12 months ended 1Q26 fell 95% year over year to about US$1.2 billion. To maintain financial flexibility and keep funding its AI investment cycle, Amazon is also streamlining its organization and improving the cost structure of its non-AI businesses. 2. Amazon's own-brand consumer electronics, including Kindle, Fire TV, Echo, Alexa-enabled products, Blink, and Ring, currently use externally sourced processors. To optimize its cost structure, Amazon plans to gradually shift away from external sourcing and adopt a COT model similar to the one used for AI chip Trainium, taking more control of processor development in-house. 3. For this transition, Amazon has selected Alchip as its exclusive partner for back-end design and testing. Alchip is expected to receive non-recurring engineering, or NRE, fees for each design project, while also benefiting from processor shipments. 4. The strategy is expected to begin in 2027. Once the transition is complete, annual shipments of Amazon’s in-house processors are estimated at around 40 million units. This shift should help improve the cost structure of Amazon’s own devices and become a meaningful growth driver for Alchip.

許多人期待、Nvidia 可能將要發布的 N1X / Windows PC 處理器，供應鏈調查與重點分析： ▌供應鏈調查顯示，配備 N1X 的裝置未來兩年出貨量約10Ｍ ➡ 仍屬利基市場，瞄準對裝置端 AI 算力有需求的重度使用者。 ➡ 未來出貨能否上修，除售價因素，還是取決於 Windows 能否提供真正調度裝置端 AI 算力的應用與工作流。 ▌目前 PC（Windows 與 Mac）的主流 AI 應用為「用瀏覽器上 LLM 網站」與「透過 API 消耗雲端 LLM 的算力 / token」： ➡ 核心都是使用雲端 AI 算力，非裝置端。 ▌2026 年 目前為止 PC 產業的兩個熱門事件，都與裝置端 AI 算力幾乎無關： ➡ MacBook Neo 的熱賣。我的產業調查顯示，2026 年該機種出貨量顯著調升約 100% (5M → 10M)。消費者買的是「低價 + 設計 + 生態」，不是買裝置端 AI 算力。 ➡ 便宜的小 PC 主機雖仍屬利基市場，但因能長時間掛機跑 AI agent（如OpenClaw）而受到高度關注（如 Mac mini）。這類 agent 的推論算力幾乎也來自雲端。 ➡ 小結：無論銷量（裡子）或話題（面子），都與裝置端 AI 算力幾乎無關。 ▌裝置端 AI 推動升級換機潮的關鍵為作業系統： ➡ 裝置端 AI 與雲端最大差異，在於兼顧隱私下，能高度整合跨應用程式的用戶資料與工作流，然這需作業系統支援。 ➡ 目前 PC 作業系統 AI 化主要仍處於「為本家應用程式增加 AI 功能」與「輕度整合跨應用程式的工作流」。 ➡ 已有善用裝置端 AI 算力的應用，如語音轉錄文字，但不足以推動顯著升級換機需求。 ▌N1X 裝置可望提供 AI 重度使用者另一個好選擇： ➡ 受益於 N1X，裝置設計能在 AI 算力、記憶體、外觀與攜帶性之間，取得一個更好的新平衡點。 ➡ 對在本地端跑 LLM 的重度使用者而言，在不錯的裝置端 AI 算力與大容量記憶體裝置的選擇上，N1X 裝置是除了 Mac 以外的另一個好選擇。 ➡ 若欲帶動顯著升級換機潮，除售價外，作業系統（Windows）支援仍是關鍵。