Google’s TPU v9 could use fewer PCB layers than Amazon’s Trainium 4 while requiring more HDI build-up steps. We think total layer count alone would understate the manufacturing work involved. Taiwan sell-side research points to a 3-28-3 HDI design for Trainium 4 in Q3 2027 and a 6-12-6 design for TPU v9 in Q4 2027. That works out to 34 total layers for Trainium 4 and 24 for TPU v9. But TPU v9 would have six HDI build-up layers on each side of its inner stack, versus three for Trainium 4. Those outer layers are added through sequential lamination, with laser-drilled microvias connecting them. More build-up layers add processing steps and place greater demands on alignment and interconnect reliability. For AI PCB suppliers, the two designs would create different production requirements. High-layer-count capability and the ability to reliably manufacture deeper HDI structures both matter as cloud providers develop their next custom chips. $GOOG $AMZN

Google's $10M bid for Spirit Airlines' data to train AI would cover: - 1.9B emails across 91K accounts - 664M Teams items - 91M SharePoint/OneDrive files - 30M lines of code - Booking and airfare data Unions dropped objections after privacy safeguards. Court approval pending.

Google's $10M bid for Spirit Airlines' data to train AI has advanced after unions withdrew privacy objections. The data includes 500M Microsoft Teams chats and 100M emails. Personal data on 97M customers & sensitive employee records will be excluded, with stricter protections.

Google's new TPU 8i Max uses $ARM based Axion CPUs to prepare data and manage AI workloads, joining TPU 8t and 8i. That means 3 of Google's 4 next-gen TPU systems now use Arm host CPUs, versus x86 hosts previously. The fourth, TPU 8tx, uses $AMD EPYC CPUs.

Google’s next-generation TPU systems are expected to adopt Aspeed’s server-management chips, according to Morgan Stanley. The bank estimates this business could account for 13% of Aspeed’s 2027 revenue. That would expand Aspeed’s role in Google’s custom-chip infrastructure, where Morgan Stanley says TPUs have historically used microcontrollers for management. Aspeed (5274 TT) designs baseboard management controllers, or BMCs, which let operators monitor hardware, troubleshoot systems and control servers remotely. Supply is one condition to watch. Morgan Stanley says a T-glass shortage currently caps Aspeed’s shipments. The company is qualifying E-glass as an alternative, which the bank believes could support shipments above 2 million units a month.