Hanmi Semiconductor (042700 KS) won a double-digit order for 2.5D packaging bonders from a Taiwanese foundry, according to ET News. The tools passed mass-production qualification and are now being deployed. Hanmi is expanding beyond HBM TC bonders into 2.5D packaging for AI processors.

China’s CCL giant Kingboard Laminates (1888 HK) just raised prices for the seventh time this year. Effective immediately for new orders, all FR-4 laminates and thick prepreg are up 10%. Thin prepreg is up 20%. Glass cloth and copper foil remain in short supply.

Memory inflation is crushing Southeast Asia’s cheapest smartphones. Omdia says shipments fell 23% YoY to 19.3 million in Q2, the lowest quarterly level since 2014. Yet average selling prices rose 31% to $342. Xiaomi’s sub-$100 shipments fell 69%. OPPO’s fell 96%. Omdia expects the squeeze to intensify in the second half as lower-cost memory inventory runs out.

NVIDIA $NVDA just introduced NVHBM IP, promising up to 25% more compute die area, 30% more memory bandwidth and 15% lower HBM power than standard HBM4E. Here’s our take on how it works and what it could mean for chipmakers and memory vendors. 1. A custom die-to-die PHY NVHBM replaces the conventional HBM interface with a custom die-to-die PHY. One possible implementation is to use fewer I/Os or lanes while running each lane at a much higher data rate. Fewer lanes would shrink the PHY block, while higher per-lane speeds would offset the lower lane count and allow total bandwidth to rise by 30%. Total bandwidth is simply the number of lanes multiplied by the data rate per lane. 2. Moving the memory controller off the XPU NVHBM moves the memory controller from the XPU into the HBM base die. The first benefit is the additional compute die area. The second is that some memory-management traffic could be handled inside the HBM stack instead of moving back and forth between the HBM and XPU, reducing interface traffic and the power used to move it. The trade-off is that the memory controller takes up space on the base die. A smaller custom PHY could offset part of that penalty. As future HBM base dies move from DRAM-class processes to advanced logic nodes, the PHY should shrink further, reducing the area occupied by the memory controller and interface. The other trade-off is heat. Moving more logic onto the base die raises its power density, making HBM thermal management even more important and strengthening the case for advanced logic processes. 3. Where the power savings may come from NVIDIA has not explained exactly how NVHBM cuts HBM power by 15%. The most obvious source is reduced traffic between the HBM stack and XPU after moving the memory controller onto the base die. We also suspect the custom PHY has been optimized for efficiency. Fewer lanes running at higher speeds do not automatically reduce power. A shift to advanced logic nodes for the base die could provide another source of savings. There is also a business case for NVIDIA. The obvious benefit is additional IP licensing revenue, but the bigger goals may be: 1. Shortening the development cycle for each new HBM generation by reducing the amount of upfront co-design required for custom HBM. 2. Lowering switching costs. A more standardized design would make customers less dependent on a single memory supplier and allow them to qualify more sources. 3. Reducing the premium charged for fully customized HBM. If NVHBM becomes a widely adopted standard, the likely implications are: 1. NVIDIA and custom XPU developers benefit from better performance and lower costs. 2. Advanced logic processes become more important for HBM base dies, benefiting TSMC $TSM, Samsung Electronics (005930 KS) and Intel $INTC. 3. Samsung Electronics (005930 KS), SK hynix $SKHY and Micron $MU could lose some of the switching-cost advantage and pricing leverage that come with proprietary custom HBM designs.

$QCOM says HBC can deliver 6x the bandwidth of HBM at the same power. Samsung Electronics and SK hynix are developing HBC alongside their HBM roadmaps. First-generation HBC is under validation in Qualcomm’s labs and is scheduled to ship with its AI250 accelerator in 2027. HBC stacks LPDDR dies above the XPU compute die using TSVs. Qualcomm designs the compute die and TSV architecture, the Korean memory makers stack the DRAM, and TSMC (2330 TT) handles integration and packaging. Qualcomm also claims 6x the token throughput efficiency of HBM at the same power. A second generation is planned for the AI300 in 2028.

Samsung Electronics (005930 KS) went from third place to No. 1 in global Mini LED TV shipments in Q2, taking 28.2% share, according to Omdia. Mini LED TVs made up 13% of global TV shipments during the quarter as Samsung and LG expanded their lineups and lowered entry prices.

AI rack battery backup units are moving from 3.5kW to as much as 25kW in two years. Taiwan battery module suppliers say 3.5kW was the mainstream BBU output in 2025. That moved to 5.5kW in 2026. Dynapack (3211 TT) has started sampling units above 15kW and targets mass production in 2027. Celxpert (4931 TT) plans 15kW and 25kW models in 2027. Dynapack also plans to triple its BBU capacity this year. $NVDA’s MGX-compatible 800 VDC power rack arrives in 2H26. A Delta Electronics (2308 TT) design shown at GTC pairs a 110kW power rack with five BBUs. The suppliers say higher-output modules require more battery cells, extending backup time and raising the selling price per BBU.

That bottleneck is already showing up at Kinsus (3189 TT). T-glass shortages leave 10–15% of potential monthly revenue unfilled. It has secured material for a 25% high-end ABF capacity increase in 2027. Upstream, Fulltech says customers want low-CTE capacity doubled in 2H26.

Google TPU shipment estimates for 2027 now range from 6.7 million to 8.8 million chips. At the high end, one Taiwan sell-side model translates that into more than 100,000 racks. We hear the same uncertainty in our own supply-chain interviews. Nearly everyone expects volumes to surge. Almost no one can pin down a precise number. The two major rack assemblers today are Inventec (2356 TT) and Celestica $CLS. Supply-chain checks suggest Foxconn (2317 TT) and Compal (2324 TT) could join in 2027 because existing capacity may not be enough.

Japan’s PC demand surge has ended: JEITA members shipped 474,000 PCs in July, down 43.9% YoY, while shipment value fell only 17.8% to ¥79.8 billion. JEITA attributes the unit decline to the end of special procurement for Japan’s GIGA School education program and the Windows 10 replacement cycle. It says higher market prices kept shipment value from falling as sharply, but its data do not show how much of the gap came from pricing versus a richer product mix. Notebook units fell 46.8%, versus a 20.8% decline in value. Desktop units fell 25.4%, while value was almost flat at -1.6%.

CW laser supply for AI data centers is already being locked in through 2030. Taiwan’s LandMark Optoelectronics (3081 TT) says a US customer has signed a four-year agreement covering 2027 to 2030 for data-center CW lasers. LandMark is securing the upstream side too. In April, its board approved a five-year InP substrate agreement with Sumitomo Electric (5802 JP) covering 2026 to 2030. Today, the board approved plans for two more InP sourcing agreements: one with a US supplier covering 2027, and another with a Japanese supplier and its Taiwan unit covering 2026 to 2029. LandMark is also putting capital behind that demand. It approved up to NT$2.27 billion, or about $71 million, in equipment investment and disclosed a roughly NT$990 million, or $31 million, equipment purchase from AIXTRON.

Shortages of high-capacitance and high-voltage MLCCs are pushing customers toward solid capacitors, according to Taiwan’s APAQ Technology (6449 TT). APAQ says MLCCs remain better suited to high-frequency circuits, while its solid capacitors provide more capacitance. Customers are rebalancing the mix rather than making a one-for-one replacement. APAQ plans to raise monthly high-end solid-capacitor capacity from 60 million units to 80 million in November 2026 and 100 million in January 2027, a 67% increase in four months. The company says orders already exceed current capacity and customers have accepted double-digit price increases in 2H26.

TSMC $TSM is planning six fabs and two advanced packaging facilities in Arizona. Supplying a US fab with high-purity chemicals can require 3 to 5 times as many tanker trucks as an equivalent fab in Taiwan, according to supply-chain estimates. In Taiwan, a truck can make several deliveries a day. In the US, some chemicals travel hundreds or thousands of kilometers, while others still arrive from Asia in ISO tanks. Federal limits on driver hours stretch each trip further. The additional trucks and chemical inventory in transit are needed to keep the fab supplied around the clock.

Simmtech (222800 KQ) is spending KRW274.2 billion to expand the SOCAMM boards and package substrates used in $NVDA’s Vera CPU systems. SOCAMM pairs LPDDR5X memory with Vera in Rubin systems, separate from the HBM attached to the GPUs. Each module uses four LPDDR5X packages, a module PCB and MCP substrates. About KRW150 billion will go toward a dedicated SOCAMM module PCB plant. Annual capacity is set to rise from KRW300 billion to KRW500 billion on a sales basis, with production starting in stages in 2028. Another KRW120 billion will expand LPDDR5X MCP substrates and high-layer mSAP boards. Simmtech expects KRW230 billion in SOCAMM-related revenue this year: KRW150 billion from module PCBs and KRW80 billion from MCP substrates.

Leeno Industrial 058470 KS can no longer take new test socket orders after a month-long strike. Its customers include $NVDA, $QCOM and $AVGO. The Elec reports orders are shifting to Yamaichi 6941 JP, Yokowo 6800 JP and Winway 6716 TT.

TrendForce expects DRAM and NAND to account for 68% of major CSP capex in 2027, up from 47% in 2026. CSPs may have to spend more to preserve AI chip volumes, or reduce memory per system.

Marvell $MRVL could pick up the memory I/O work in Google’s $GOOGL TPU v10. Morgan Stanley still expects Broadcom $AVGO and MediaTek 2454 TT to keep the core TPU design roles. In the bank’s model, Google owns the compute die and photomasks. MediaTek designs the electrical I/O die and integrates the compute die, I/O die and HBM using Intel’s $INTC EMIB-T packaging. Global Unichip 3443 TT or another design house could handle 3D IC and CPO. TPU v10 could move to 3.5D packaging and expand beyond 12 reticle equivalents, compared with roughly nine today. Even without revenue from the compute die, Morgan Stanley estimates MediaTek could book about $18,000 per TPU v10, up from $13,000 on v9. The bank models 4 million v9 units and 1 million v10 units in 2029, putting MediaTek’s TPU revenue at around $70 billion.

New estimates from Taiwan expect NVIDIA $NVDA’s move to 1.6T cables to begin in 4Q26, with the larger ramp coming in 2027. They also cut active electrical cable revenue forecasts for Taiwan supplier BizLink 3665 TT by 27.9% for 2026 and 24.3% for 2027. BizLink’s 1.6T capacity was ready in 2H26, but most US cloud providers are still early in their 800G deployments. Vera Rubin is expected to be the first server platform to use a 1.6T transmission architecture. Credo $CRDO also sells AEC products supporting speeds up to 1.6T, so the timing is relevant to the market it serves. The report does not say Credo’s own orders have been delayed.