$QCOM says HBC can deliver 6x the bandwidth of HBM at the same power. Samsung Electronics and SK hynix are developing HBC alongside their HBM roadmaps. First-generation HBC is under validation in Qualcomm’s labs and is scheduled to ship with its AI250 accelerator in 2027. HBC stacks LPDDR dies above the XPU compute die using TSVs. Qualcomm designs the compute die and TSV architecture, the Korean memory makers stack the DRAM, and TSMC (2330 TT) handles integration and packaging. Qualcomm also claims 6x the token throughput efficiency of HBM at the same power. A second generation is planned for the AI300 in 2028.

$QCOM CEO Cristiano Amon on HBC as agentic AI becomes the norm on all devices. “Some of those future agentic AI devices that you have seen, they may process up to 1M tokens per day on the device while remaining available throughout the day.” HBC (High Bandwidth Compute) uses 3D stacked low power memory and places AI compute closer to that memory, dramatically reducing the amount of data that needs to move around the chip. That means higher AI performance with much better power efficiency, which is critical for running agentic AI all day on a battery powered device. HBC was originally developed for the data center and $QCOM is now scaling it down to smartphones and then to laptops, smart glasses and cars too.

AI inference is memory-bound more often than compute-bound. High Bandwidth Compute (HBC) flips the traditional model by moving compute to the data, helping unlock dramatic gains in memory bandwidth and efficiency. Learn more:

$QCOM up 10%+ this week. Textbook BLUE candle launch: (W) BLUE candle right under a huge volume shelf at $172. Fundamentals: Auto +61%, IoT climbing, and a datacenter AI push (AI200/250) built on HBC that eats $DRAM Get 300+ charts daily. Try it free:

Apple may have no choice but to buy older, bigger footprint LPDDR from China. Here's why. In 2027 AMD, Qualcomm & NVIDIA are now bidding for the same mobile memory that goes into your iPhone. $AMD EPYC Verano server CPUs adopt LPDDR5X on SOCAMM2 (2027). $QCOM AI200/AI250 carry 768GB of LPDDR per card (HBC) $NVDA Vera CPUs attach massive LPDDR5X via SOCAMM2 in Vera Rubin racks. "One of the most promising developments is Low Power Double Data Rate 5X (LPDDR5X) memory deployed using the recently JEDEC approved Small Outline Compression Attached Memory Module (SOCAMM2) form factor, which promises to combine the proven power efficiency of LPDDR5 mobile memory with the modularity and serviceability required in server environments." -An Excerpt from AMD Article