$NVDA Jensen Huang announces the NVIDIA Vera Rubin DSX POD, a full-stack modular AI factory reference architecture. The slide reads: factory-built, integrated, pre-tested clusters, delivery-to-deployment cut from months to days, "The Container is the AI Factory." Partners on the slide include Dell, HPE, Lenovo, Schneider Electric, Vertiv, Eaton, Delta and Wistron.

$SIVE $NVDA $AMD AYAR LABS' OPTICAL LINK IS NOW RUNNING INSIDE A CUSTOM ASIC PACKAGE, IN A WORKING SERVER, AT OCP. CO-PACKAGED OPTICS JUST WENT FROM RACK DISPLAY TO LIVE SYSTEM SAN JOSE, Oct. 13 - Wiwynn (TWSE: 6669), Ayar Labs and Global Unichip (TWSE: 3443) are running their first live demonstration together at the OCP Global Summit: a Wiwynn compute system carrying GUC's ASIC with Ayar's TeraPHY optical engines packaged alongside it, lit by Ayar's SuperNova external light source and streaming the engines' health data in real time. The three companies call it a step up from their earlier rack-level architecture work to "platform integration and functional validation." - GUC multi-chip packages with TeraPHY optical engines inside, fed by ELSFP-based high-power SuperNova light sources, in an ORV3-ready compute system - Telemetry polled continuously from the engines inside the packages, "proving the optical link is up inside the system" - As the tuning loop tracks thermal and wavelength drift, eye height, OMA and extinction ratio hold steady on screen - Detachable fiber array unit and in-chassis fiber routing, built for servicing and manufacturing - Wiwynn's own cooling design keeps optical power stable under real operating conditions "The bar is no longer whether it works; it's whether it can be deployed and managed at scale," Ayar CEO Mark Wade said in the release. Ayar counts NVIDIA ($NVDA) and AMD ($AMD) among its strategic investors, so both GPU camps already own a piece of the engine being validated here. The light source is SuperNova, and Sivers ($SIVE) has been part of it since 2022: its DFB laser arrays lit SuperNova at ECOC that year, it booked a $1 million Ayar order for light source technology in July 2023, and the two expanded the partnership toward high-volume manufacturing in December 2024.

Last November @FundaAI called $LITE "the name that benefits the most from the TPU." It closed at $253.81 that day. 🧐 It closed at $1,111.07 on Wednesday, up 338%! 🚀 Now they say Lumentum's OCS revenue passes $2.5B next year!

$MRVL: SCALE-UP OPTICS GOES FROM ZERO TODAY TO "MULTI-100 MILLION STARTING NEXT YEAR" NEW YORK, Oct. 6: Marvell Technology ($MRVL) told investors at its investor day on Tuesday that it has "virtually no revenue" today in scale-up optics, the optical links that tie AI accelerators into one shared-memory domain. Asked in the Q&A how to model it, CEO Matt Murphy said: "Multi-100 million starting next year, but that's going to ramp extremely hard." Dave Lazovsky, who runs Marvell's data center networking business and founded Celestial AI, laid out the sizing: - "on the order of thousands of dollars of scale up optics per XPU" - Optics needed "on both the XPU side as well as the switch side" of each link - Scale-up bandwidth of at least 16 Tbps per XPU, which the slide calls "roughly 10 × 1.6T links" - At 200G per lane, copper reaches 2.5 meters, which keeps scale-up inside one rack - Scale-up carries 85% of total data center traffic, by Marvell's count The product slide splits the business into three lanes and puts a date on each product. SiGe drivers and TIAs sold to module makers for 200G NPO, and Marvell's own 200G "Fast Pipe" light engine, are marked "Now." The 400G light engine, the OCI MSA flat pipe and Photonic Fabric are marked 2027. Murphy said NPO designs were "already won a year ago" at the module vendors and are "now landing in real customer design wins today." "NPO is a train that's going to run," he said, with CPO driven in parallel. Lazovsky said the industry is moving to "whatever optics they can push into production as quickly as possible," which in many cases means repackaging pluggable transceivers and Fast Pipe engines "into an NPO form factor." In that form factor, he said, "we win when our module partners win."

Bullish $MRVL. 🚀 Marvell put a number on the long run at its investor day in New York on Tuesday, Oct. 6: $70–90B of revenue in fiscal 2031, up from $8.2B in fiscal 2026. Damnang wrote in August that the scale-up NPO and CPO upside wasn't fully in the Marvell numbers yet. The Oct. 6 deck is where it starts showing up.💪 The biggest line in Marvell's own FY31 breakdown isn't custom silicon. It's interconnect, at about $37.5B at the midpoint, growing 60–70% a year from FY26. Custom comes in around $30B. Marvell also raised its FY28 revenue outlook from $18B to $20B, lifted the FY29 custom target from $10B to $12B+, and put scale-up at more than 85% of AI data center traffic, with copper topping out at one rack of up to 144 XPUs. So by FY31 the connectivity side, the DSPs and optical engines that move data between chips and racks, is set to be Marvell's largest business. Every scale-up domain that crosses the rack runs through that line.

$INTC $AMD $MU $SNDK $STX $WDC WOW! GOOGLE'S AI INFRASTRUCTURE CHIEF SAYS AGENTS ARE SENDING CPU AND STORAGE DEMAND "THROUGH THE ROOF," RIGHT ALONGSIDE TPUs AI agents are pushing up Google's demand for CPUs, memory and storage along with its demand for TPUs, Amin Vahdat, the company's chief technologist for AI infrastructure, said in an interview Sequoia Capital released on Oct. 6. "The demand for accelerated compute is going up, but the demand for CPU and networking and storage... is also going through the roof at the same time," he said. - Time between requests: "seconds, maybe tens of seconds" when a human reads each answer, "perhaps milliseconds" when an agent does - Between model calls, the parsing and reasoning "is going to probably happen on a CPU" - That CPU then pulls context "from DRAM local to me, maybe from someone else's DRAM on another CPU, maybe on SSD, or maybe on HDD somewhere else" - A storage rack draws 10 to 40 kilowatts against "hundreds of kilowatts" for a TPU or GPU rack, so Google may put CPUs and hard drives in their own buildings and network them to the accelerators - Serving clusters are "not necessarily cheaper" per megawatt than training clusters, because serving needs "the mix of storage, compute and accelerators" in one place I put his agent answer next to what he said about Google's new inference chip, the TPU 8i. Google split it off because it expects inference to be 30% to 60% of the chip market over the hardware's life, and inference is the part of the build he says can't run on accelerators alone. So CPU, DRAM, flash and disk orders now ride the same curve as Google's inference build-out. That CPU is x86 from $INTC and $AMD or Google's own Arm-based Axion. The context sits on DRAM from $MU, flash from $SNDK and hard drives from $STX and $WDC. Every extra step an agent takes is extra work for all of them, whether or not another TPU gets installed. A chatbot waited seconds on a human. An agent waits milliseconds, and spends them on a CPU and a disk.

$TER $LITE $COHR $KEYS $AMKR WOW! TAIWAN'S NEW STATE CPO GRANTS GO TO ALIGNMENT AND TEST. THE CALL ITSELF SAYS TESTING CAN EAT 20–30% OF A MODULE'S COST TAIPEI, Oct. 6 — Taiwan's National Science and Technology Council has opened calls for two three-year university research programs, one on silicon photonics and co-packaged optics (CPO), the other on power conversion for next-generation AI data centers. The council's engineering department sent the calls out in a letter dated Oct. 2, universities began forwarding them on Oct. 6, and campus deadlines fall on Dec. 31. Funded projects would run from Aug. 1, 2027 to July 31, 2030. The photonics call is aimed at the packaging and assembly level, and its documents state plainly that chip design and wafer manufacturing are out of scope. The suggested target specs: - Fiber-to-chip alignment accuracy of ±0.5 µm, coupling loss under 1 dB - A 16-channel fiber array aligned in under 90 seconds on a demo line, under 60 seconds as a stretch goal - CPO packaging cycle under 120 seconds per module, yield above 85% - 800G to 1.6T module testing in under 60 seconds per module, 4 to 8 channels in parallel, more than 85% automated - CPO first-pass yield above 80% The documents say testing may account for 20% to 30% of module cost as demand for 800G and 1.6T data center modules rises, and that fiber-array coupling with external lasers, thermally stable packaging and testability are among the biggest obstacles to industrialization. They put CPO's power saving at roughly 60% versus pluggable optics in rack-to-rack (scale-out) links, and roughly 80% if it moves inside the rack (scale-up). They also describe 2026 as the year silicon photonics and CPO move from qualification into volume ramp, citing $NVDA's newsroom. Each team must sign a domestic company before applying and show its milestones at that partner's site or at the partner's customer. Funding is capped at NT$8 million a year per project, about US$252,000, and the program generally won't pay for large equipment. The power call is capped at NT$7 million a year and is designed for a DC bus above NVIDIA's 800 V. It assumes buses will rise to 1,200 V or 1,500 V and sets these targets: - A solid-state transformer taking 34 kV or 13.2 kV medium-voltage AC down to 1,200 V or 1,500 V DC, demonstrated above 12 kW, at 97% peak efficiency - A 1,200 V or 1,500 V to 54 V converter at 12 kW and 98% peak efficiency - A 54 V to 1.8 V stage delivering 100 A with a power-density goal of 1,000 W per cubic inch - A DC solid-state circuit breaker that opens in under 25 microseconds DIGITIMES reported the two programs on Oct. 6. I put the photonics call's supply-chain chart next to the U.S. optical and test names we follow. The chart, compiled by the council's semiconductor expert group, places $LITE and $COHR in the laser slot, $TER and $KEYS under test equipment, $AMKR and $GFS in CPO packaging, and $GLW under glass substrates. $AAOI and $FORM are not on it, and the probe-card slot goes to Taiwan's MPI (6223 TT). The chart says its list is not exhaustive. The grant won't pay for testers, so that equipment has to come from partners and existing labs, and on the chart's test-equipment row the only U.S. names are Teradyne and Keysight.

$CIEN $SIVE CIENA: ENGINES WITH BUILT-IN LASERS RUN 30% WIDER AND 2X LONGER, SO TRUE CPO GOES WITH EXTERNAL LASERS Oct. 2 - Ciena ($CIEN) expects true co-packaged optics to run on external lasers, and its own 6.4T optical engine already does. "When you get to the true CPO architecture, I think that's almost for sure we'll use an external laser," Dan Harding, Ciena's vice president of engineering, said at an online forum hosted by Cignal AI on Sept. 18, the week before ECOC 2026. The replay went up Oct. 2. - Switch volume ahead: "over a million 100T and 200T switches deployed per year, starting in a couple years" - Ciena's engine: 6.4T, 32 x 200G, in-house silicon photonics, external light source - Modules with an integrated laser: "about 30% wider and about twice the length" - A 200T switch needs eight engines side by side, which he called "more problematic" with integrated lasers - Heat next to the optics: a main switch heat sink of 1,000 to 2,000 W - Connectorized NPO, he said, is headed for "a million plus style volume per year" "As people know, when you place lasers, lasers get hot," Harding said, and that is the trouble with putting them right beside a switch ASIC. The open OpenCPX connector standard he walked through is agnostic between external and integrated lasers, and he expects OEMs to ship boxes that support both, while Ciena has "always gone with ELS," the external light source. I lined his timeline up with the external-laser capacity already announced: $SIVE's Glasgow expansion, sized for more than 100 million CW DFB lasers a year, the continuous-wave type that feeds an external light source, is scheduled to come online in Q4 2027. Harding put the million-switch run rate "a couple years" out from Sept. 18, and the Glasgow line is set to start a few quarters ahead of it.