$NVDA $SKHY $MU $005930 - $NVDA reduced Rubin HBM4 bandwidth from 22 to 19.2 TB/s, down 12.7%. - This implies a reduction from approximately 10.75 to 9.375 Gbps/pin. - HGX Rubin NVL8 memory capacity fell from 2.3 to 2.0 TB, down 13%. - NVL8 aggregate HBM4 bandwidth dropped from 176 to 130 TB/s, down 26%. - TrendForce previously reported that HBM supply constraints and HBM4e qualification uncertainty were prompting NVIDIA to reconsider Rubin Ultra memory configurations. > The critical issue may not be whether HBM4 can reach 10.75 Gbps, but whether suppliers can deliver sufficient volume at acceptable yields. > The NVL8 capacity reduction strengthens the possibility of HBM supply or yield constraints beyond simple clock optimization. > A seven-stack configuration remains speculative, and the bottleneck could lie in the HBM stacks or GPU memory controllers. > The 16.7% NVLink bandwidth reduction suggests HBM alone may not explain every specification change. > For $005930, $000660, and $MU, production yield and qualified supply volume at Rubin's required speeds may matter more than maximum advertised bandwidth. > Lower qualification requirements could also reshape competition among HBM4 suppliers.

To summarize GFHK's note: Rubin's SOCAMM2 has been nerfed once again — down to 64GB. But is that bearish? If anything, it's the opposite. Working off a 192GB SOCAMM2 configuration, NVIDIA had asked the memory makers for a corresponding volume of SOCAMM2 — and the memory makers came back telling them they could only supply 60–70% of that volume. This isn't a demand problem, it's a supply problem. The spec was cut because they couldn't get the SOCAMM2 supply. What about HBM? Contrary to what a certain research house published, Rubin Ultra is not being considered with 8Hi only. An HBM4E 12Hi SKU is also under consideration. It is a step down from the original 16Hi — but everyone already knew that, right? NVIDIA needs 12Hi if only to compete with AMD. The 8Hi is there to accommodate SKU requests from a subset of customers.

Nvidia got FAFOed multiple times with Rubin/Rubin Ultra design - They pushed for higher pin speed HBM4, but Micron's & Hynix's base die were subpar, so they had to change plans & face delays (lower pin speeds) - They pushed for a quad die Rubin Ultra design, yield and warpage issues forced them to switch to 2 die and 2+2 die MCM design - They pushed for 16 Hi HBM4E for Ultra, yield issues forced them to come back down to 12 Hi - They pushed for a dual profile 2.3kW/1.8kW Rubin, but indium-graphite TIM was unstable and now they are switching back to graphite TIM

Keybanc: Supply chain partners indicate that Nvidia is sampling a Rubin Ultra GPU with 384GB of HBM4E based on 8x12H. This would represent a 33% increase in memory density over Rubin, which has 288GB of HBM4 memory. However, most memory suppliers expect that Rubin Ultra will despec to 256GB of HBM4E based on 8x8H, which would represent a decline of 11%. $NVDA $MU $DRAM $EWY

Morgan Stanley: As we move to multi-rack clusters like the Rubin Ultra NVL576, networking doubles its share of total rack value to 20%, while single-rack memory density compresses. GB300 NVL72: 57% GPU | 15% Memory | 8% Networking Rubin Ultra NVL72: 55% GPU | 19% Memory | 10% Networking Rubin Ultra NVL576 (Multi-rack): 49% GPU | 17% Memory | 20% Networking $NVDA $CRDO $CSCO $LITE $COHR $AAOI

Aletheia dropped some juicy information today: - NVIDIA’s Rubin Ultra is unlikely to use HBM4 and will instead use 8-high and 12-high HBM4E. - Kyber has not been canceled, and the four-die Rubin Ultra remains on the roadmap. - The four-die Rubin Ultra could be used in Kyber. It could also be implemented through an OSAT by stitching together two dual-die packages on an ABF substrate. - The four-die Rubin Ultra could feature up to 768GB of HBM4E. Looks like a good time to buy memory again.

$SKHY and Samsung are reportedly preparing to supply 8-layer HBM4 for $NVDA Rubin Ultra by Q2 2027 as heat and manufacturing challenges complicate taller 12-layer stacks. So this looks like Nvidia is willing to sacrifice some memory per stack for more reliable production which says a lot about how important shipping these AI systems at scale has become.