Register and share your invite link to earn from video plays and referrals.

🌿 lithos
@lithos_graphein
Three decades in semiconductor lithography. I run the Litho War Dashboard site; it's a live feed of the freshest semi news & market data.
3.1K Following    21.9K Followers
SMEE just confirmed their prod. install base on the front-end is a handful of tools. Install base > machine data > spec. dev.
Are ppl really selling bc there's a pkg substrate shortage?
SCREEN is expanding production of its wet clean WFE tools in Nagaokakyo. Cleans are the most common step in the fab (~30%), needed before/after etch, CMP, and implant.
Lithography scanners aren't money printers; they print machines that keep doing work for years. Take a $100 bill. That same area of silicon is worth: ~$4,400 as TSMC 2nm logic ~$14,000 as DDR5 DRAM
Show more
PLP will be very disruptive to WFE and the industry in general. The substrate configuration is a big deal in semi, since it drives much of the economics. Here we're moving from round to square, which is a monumental change. On top of that, there's a wide array of panel sizes still trying to find their footing as the standard. We're already seeing big challenges on the litho side, with processing needs we just haven't encountered before.
Show more
Litho curse: this reminds me of when Intel switched from SVG Micrascans to Nikons. Now they've picked the right vendor but the wrong EUV tool.
KLA is classic Coke. They continue to sell high-end inspection and litho overlay tools to China, 34% of revenue, their largest region. Say my name. $KLAC
Samsung's advanced EUV process leak mentions temperature and a solvent. There are 2 places this could be used, both for Metal Oxide Resist (MOR). Heated solvent developer has been published on for this, although AFAIK no benefit has been observed yet. And industry is leaning toward dry develop anyway which has clear benefits. Edge Bead Removal (EBR) for wet MOR. In the spin coat process, the photoresist at the edge of the wafer needs to be cleaned off in the track to prevent contamination of the robotics that grip the wafer. It's very hard to clean MOR with a solvent; it leaves trace metals behind. Since a single metal atom could kill a chip, this is a problem. There are 2 ways the industry is dealing with this now. One is a formulated EBR solvent plus an acid. It's unclear whether this will prove to be 100% reliable. The other is an expensive edge protection layer process that protects the wafer edge before MOR is coated. This is known to work, but it adds a lot of extra steps and cost. So a heated, formulated EBR chemical could also be used to enhance the first method. I've not seen anything on this yet; it would be a brand-new process tech.
Show more
Loyal customer: BorgWarner gave Wolfspeed half a bill for the expansion. That helped fund the overbuild, then Chapter 11. Wonder how the original capacity & pricing deal is aging.
Show more
while (1) { // Semitax loop layoff(); taxbreak++; try { hire(); } catch (...) { sleep(1); } }
A single tear falls from my eye. 🥲 EUV is mainstream now.
ASML EUV 생산 캐파
Semitools for e-test are on fire rn. I think it may have been Claus that pointed out recently they were outperforming the rest of semitool. What's fundamentally driving this? 🤔
Show more
SkyWater launched their OnRamp quantum foundry initiative today and unveiled a deeper look at the 200 mm SiN photonics platform behind it.
300mm GaN in Villach, ramps in a year.
Final Dune trailer just dropped! Dec 18. A fitting finale for the year spice shattered the $1 trillion glass ceiling.
The DOE just added Helium to the critical materials list bc of its role in semiconductor manufacturing. We actually used to maintain a strategic reserve for this. The only other gas on the list is Fluorine.
Show more