"EUV tools are certainly key to manufacturing advanced chips. China is currently working on these tools, but right now we’re still relying on DUV domestically."
- Richard Yu, Huawei, 9/29/2026
Samsung's advanced EUV process leak mentions temperature and a solvent. There are 2 places this could be used, both for Metal Oxide Resist (MOR).
Heated solvent developer has been published on for this, although AFAIK no benefit has been observed yet. And industry is leaning toward dry develop anyway which has clear benefits.
Edge Bead Removal (EBR) for wet MOR. In the spin coat process, the photoresist at the edge of the wafer needs to be cleaned off in the track to prevent contamination of the robotics that grip the wafer. It's very hard to clean MOR with a solvent; it leaves trace metals behind. Since a single metal atom could kill a chip, this is a problem.
There are 2 ways the industry is dealing with this now. One is a formulated EBR solvent plus an acid. It's unclear whether this will prove to be 100% reliable.
The other is an expensive edge protection layer process that protects the wafer edge before MOR is coated. This is known to work, but it adds a lot of extra steps and cost.
So a heated, formulated EBR chemical could also be used to enhance the first method. I've not seen anything on this yet; it would be a brand-new process tech.
China’s #EUV# breakthrough or still a long way to go? Langdao Silex unveils a 90%-domestic light source prototype, but commercial systems need far more power, with mass production reportedly 3–5 years away.💡More: 🔗
The ASML high-NA EUV Lego Set is extremely rare and only available to employees from the company store. But there are directions and a full 800-piece parts list on rebrickable. It's not exactly what ASML offers, but the modifications are tasteful. Many of these bricks are hard to source, so I made my own version. I do a tool install every Christmas over my fireplace. It's almost that magical time of year again.
Preview| $ASML 26Q3: Raising EUV Shipment Expectations Again
Capacity Expansion Likely to Accelerate
We believe ASML will further ease its capacity bottlenecks, with 2027 low-NA EUV capacity likely to exceed 95 units, above the company’s current guidance of 85 units. Our industry checks also indicate the supply chain is planning production around higher shipment targets. We keep our 2026 total EUV shipment forecast at 70 units and raise 2027/28 to 100/125 units.
Detailed Report
$ASML AND TSMC PUSH EUV MASKS TO 12-INCH FORMAT
ASML and TSMC launched an industry initiative to move EUV lithography from today’s 6-inch photomasks to 12-inch masks.
The plan targets a 12-inch mask pilot line by 2031 and advanced-node production using 12-inch High NA EUV by 2033.
TSMC also plans to adopt ASML’s High NA EUV in high-volume manufacturing from 2030.
The larger mask format is designed to improve fab productivity, reduce chipmaking costs and eliminate stitching constraints as more advanced AI-era chip layers move to High NA EUV.
TSMC plans to start using High-NA EUV in 2030, when it expects the technology to be mature, C.C. Wei said on the company’s Oct. 15 earnings call.
Asked whether adopting it later than rivals would put TSMC at a disadvantage, Wei said new tools must offer advanced technology at a reasonable cost and be mature enough for mass production.
TSMC is also working with ASML on 12-inch photomasks, targeting 2031. Wei expects High-NA to be cost-effective enough for mass production at that point.
$ASML said it sold 17 EUV machines during Q3
The machines cost as much as $400 Million per unit and are critical for the making of the most advanced semiconductors