Is Lumentum's laser moat disappearing? Co-packaged optics (CPO) shifts modulation onto silicon photonics chips (like Nvidia's), replacing complex EMLs with simpler, high-power (300-400mW) continuous-wave lasers. Essentially, a flashlight. Does the real moat still exist?

In this episode, you will notice that the video looks ... different. We hired a designer to come up with a beautiful looking theme that is inspired around campfire colors, outdoors looking at the night sky. We take aesthetic very seriously, because it provides a certain look to the end product. And we wanted it to have a premium feel. Our editor then took all the brand design, and implemented it here, and will continue to do so every episode from now on. We have a small team of dedicated, and hardworking folks who tirelessly help us with this podcast. We could never do this alone, and it always helps to take a step back and acknowledge those who make it possible. 🙏🏽

🎙️ NEW EPISODE: TSMC Will Buy High NA After All: ASML's New 6x12-Inch Mask Austin and Vik break down ASML's High NA EUV, whose anamorphic optics cut the exposure field in half, the new 6x12-inch masks that restore the full field size, and what the change means for the mask supply chain. - High NA uses anamorphic optics with 4x by 8x demagnification - A 12-inch mask restores the full 26mm x 33mm field size - Samsung targets High NA for DRAM in 2028, ahead of TSMC. TSMC is interested now though! - Intel is a million wafers deep on its High NA learning curve - Nearly 30% of ASML's revenue is recurring services income Chapters: 0:00 Episode Opening 2:23 The Rise of AI Agents 6:00 Instinct: The Autonomous Agent 10:50 Productizing AI for Mass Adoption 14:03 From AI Agents to ASML 24:29 The Photomask Stitching Problem 31:49 High NA's Anamorphic Optics Tradeoff 36:39 The Cost of a Halved Reticle 37:26 The 6x12-Inch Mask Solution 39:08 A Full Supply Chain Problem 41:17 TSMC, Samsung & Intel Timelines 48:24 Intel's EUV History Lesson Get more of Austin and Vik daily, free! Sign up: Connect with Vik and Austin: Vik's Paid Substack: Austin's Paid Substack: @austinsemis @vikramskr

Log math is an old trick: turn expensive multiplies into cheap adds. So why isn't every AI chip logarithmic? Because once you're in the log domain.... you still have to get back to linear, without losing the gains. Tensordyne claims they've figured that out.

AI accelerator startups need to ship a full system, not just a chip. Tensordyne's strategy: partner with HPE Juniper for the networking stack. This gets them to market faster with telco-grade 'five nines' reliability (<5.3 min/year downtime) from day one.

TSMC Holds at Microbumps for HBM, Deferring Hybrid Bonding CapEx Vik: I am bearish hybrid bonding at least for HBM applications. High stacks are too expensive, and hardware makers won’t bite into it.

Broadcom’s AI Chip Forecast Clouds Over Google Defection Fears Vik: OpenAI’s Jalapeno’s quick turnaround is actually testament to Broadcom’s ASIC design prowess, come to think of it. Austin: Second-sourcing and CoT are price negotiations; no one in the race to deploy inference compute is walking away from Broadcom.

Daily Update - September 3rd, 2026 - Nvidia acquires Hugging Face for $12.93B - Broadcom AI chip forecast clouds over Google - TSMC holds at microbumps for HBM - Samsung pushes HBM into vertical territory - Phison warns 2027 NAND shortage worst ever

Daily Update - September 2nd, 2026 - OpenAI's Compilers 2.0 uses AI for kernel optimization - Nvidia nears $14B Hugging Face acquisition - SK Chairman considers Japan chip plant with Kioxia - TSMC tool procurement nearly doubles

FEELING HOT HOT HOT! 🎙️ NEW EPISODE: OpenAI's Jalapeño! Vik and Austin react to @OpenAI's Jalapeño inference chip, announced at Hot Chips by @rh00 @cdleary. - "Dark silicon is cheaper than idle accelerators": one balanced chip beats a GPU + LPU pair? - Nine months from RTL to tapeout, a Blackwell-class chip designed with AI for EDA - NUMA-style local HBM slices per accelerator fix the "operands arrive late" problem - Broadcom ESUN scale-up: 128 chips per rack at 600 GB/s, 2,048 chips across 16 racks at 200G (still scale up!) - The "regret factor": opportunity cost of missing a future model beats the cost of generality Plus the extra spicy questions: should OpenAI sell it, how much of the RTL was AI-written, and where is Anthropic's chip? Chapters: 0:00 Hot Chips Reaction 2:32 Designing for User Experience 11:16 A Generalized Inference Chip 14:18 The Foundry-IDM Analogy 18:42 The 'Regret Factor' 21:02 The 9-Month Design Cycle 23:45 Challenging the Two-Chip Solution 35:08 Solving HBM Underutilization 36:46 The NUMA Architecture Solution 39:28 System-Level ESUN Networking 42:06 Dark Silicon vs. Idle Accelerators 49:08 A Wake-Up Call for the Industry 52:59 Where's Anthropic's Chip? Get more of Austin and Vik daily, free! Sign up: Connect with Vik and Austin: Vik's Paid Substack: Austin's Paid Substack: @austinsemis @vikramskr

OpenAI Jalapeño ASIC Claims Performance Edge Over Nvidia GB300 Austin: Note that comparing the HBM4-equipped Jalapeño to HBM3E-era Nvidia Blackwell and AMD MI355X is a bit unfair; looking forward to the Vera Rubin and Helios comparisons.

Intel's advanced packaging business has "billions of dollars" in commitments. But what if a capability few are watching is the real story? Intel has a strong optics process. Combined with EMIB, could they build a major advantage in co-packaged optics (CPO)?

Why are OSATs like Amkor trying to get into advanced packaging? As more value accrues to advanced packaging, traditional OSATs risk getting left behind by foundries. Are they trying to move up the value chain before it's too late?

🎙️ NEW EPISODE: Tensordyne co-founder and CPO R K Anand joins Austin to break down an AI inference rack built on a router-based scale-up fabric and logarithmic math. - HPE Juniper's 7th-gen router fabric provides the scale-up network at 1-2 microseconds of latency - Log math turns expensive multiplications into cheap adds - The compute die stays below the reticle limit, leaving room for a big on-chip SRAM cache - 72 chips in a 13U chassis at 30 kW, a quarter of the space and power of an NVL72 - Air cooling opens brownfield enterprise and telco data centers - One system runs both pre-fill and decode @TensordyneInc @_rk_anand_ Chapters: 0:00 Introducing Tensordyne 5:32 The Juniper vs. Cisco Playbook 11:29 Origin Story: Automotive Power Constraints 15:37 The Secret Sauce of Log Math 18:02 Pivoting to the Data Center 22:08 Leveraging a Router Backplane for AI 27:22 Why Router Fabrics Suit MoE Models 34:12 The Three Phases of Inference Hardware 37:40 How One Chip Handles Pre-fill & Decode 40:34 The 'Too Good to Be True' System Specs 43:31 Go-to-Market: The Air-Cooled Advantage 48:21 De-risking with Strategic Partnerships 52:37 Solving the Software Problem with AI Get more of Austin and Vik daily, free! Sign up: Connect with Vik and Austin: Vik's Paid Substack: Austin's Paid Substack: @austinsemis @vikramskr