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@paurooteri
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This is a very puzzling claim. The overall yield of EMIB cannot exceed the yield of the silicon bridge embedding process in the ABF substrate. I have seen numerous reports on EMIB yields over the years, but most have provided only fragmented information. I suspect that very few people actually have an accurate understanding of the yields at each individual process step. To the best of my knowledge, the yield of conventional EMIB (non-EMIB-T) is significantly higher than the figures cited in this report.
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Yes, Ibiden to the moon! 🚀
Judging by the base die production figures below, Samsung's HBM4 is progressing very smoothly. It appears they are preparing a substantial volume not only for Nvidia, but also for AMD and Broadcom + OpenAI. >>>> Samsung Electronics is mass producing 4nm to 7nm class processes on foundry lines (S5, S6) at Pyeongtaek Campus 2 (P2) and Campus 3 (P3). Of this, the production capacity allocated to 4nm is estimated at around 30,000 wafers per month. Taking this into account, wafer starts for HBM4 base dies are observed to be running at roughly 15,000 wafers per month.
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Samsung Foundry Goes All In on HBM4 Expansion... Half of 4nm Capacity Now Devoted to Base Dies The share of Samsung Electronics' foundry 4 nanometer (nm) process allocated to mass production of base dies for sixth generation high bandwidth memory (HBM4) has recently surpassed 50%. The move is seen as a preemptive step to expand HBM4 supply to global big tech customers such as Nvidia, Broadcom, and AMD in the second half of this year. According to industry sources on the 7th, Samsung Electronics' Foundry Business Division is putting more than half of its 4nm process wafers into the manufacturing of base dies for HBM4 in the second half of this year. HBM4 is the newest generation of HBM currently in commercial production. It is used in Nvidia's most advanced AI accelerators, including Vera Rubin. Samsung Electronics was the first in the industry to begin mass production shipments of HBM4 in February. As this was the initial production run, supply volume in the first half of the year is estimated to have been limited. Samsung Electronics plans to expand HBM4 supply in earnest starting in the third quarter of this year. In line with this, it has been sharply increasing wafer starts for HBM4 base die mass production since the middle of the year. The chip is built on Samsung Foundry's 4nm (SF4) process. Putting together accounts from inside and outside Samsung Electronics, as of last month, more than 50% of Samsung Electronics' total 4nm production capacity had been allocated to HBM4 base dies. One source familiar with the matter said, "Samsung Electronics' 4nm process is currently running at full production, and as I understand it, HBM4 base dies account for 50% to 60% of that," adding, "the high share will be maintained throughout the second half." Samsung Electronics is mass producing 4nm to 7nm class processes on foundry lines (S5, S6) at Pyeongtaek Campus 2 (P2) and Campus 3 (P3). Of this, the production capacity allocated to 4nm is estimated at around 30,000 wafers per month. Taking this into account, wafer starts for HBM4 base dies are observed to be running at roughly 15,000 wafers per month. The base die sits beneath the core dies, which are multiple DRAM dies stacked vertically, in an HBM package, and supports data transfer between the memory and the system semiconductor. As HBM generations advance, the importance of the base die continues to grow. Accordingly, Samsung Electronics is further advancing its base die technology through its internal System LSI and Foundry Business Divisions. In particular, for HBM4 it has applied a 4nm process that is ahead of its competitors. This expansion of base die mass production is being assessed as a green light for Samsung Electronics to achieve its HBM business expansion targets for this year. Earlier, on its second quarter earnings conference call, Samsung Electronics stated, "HBM4 revenue in the third quarter of this year is expected to expand by more than three times quarter over quarter," and explained, "on a second half basis, HBM4 revenue will comfortably exceed 60% of our total HBM revenue."
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Correct. We are almost the same.
【悲報】中国、韓国、日本がお互いをどう見てるか
Wrote up some thoughts on memory talks from Hot Chips today. We cover slides from SK Hynix, Micron and Samsung. Fully free post. Enjoy.
Wow, is this a sign that ever-growing model parameters are being stored outside of HBM?
I’m probably the only person at Hot Chips trading stocks.
As I have repeatedly warned, external modem chips like the MediaTek T900 require legacy memory, specifically, LPDDR4X. While the capacity is 512MB, the severely constrained procurement of this memory will pose a significant issue. Apple is no exception to this.
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The Xiaomi XRING O3 used the Mediatek T900 External Baseband with 7.4Gbps Peak Download Speeds. Furthermore, the G2 Ultra GPU is Clocked at 1.6GHz & has 16 cores. The SoC has a SLC (System Level Cache) of 16MB & 16MB L3 Cache.
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No modem function. Big CPU core and large cache, L3, SLC and NPU L. Totally 138mm^2 area. Huge chip ever.
XiaoMi XRING O3 Dieshot Diesize 12.81mm x 10.80mm analysis video in Bili