📈 #Intel#'s #EMIB-T# is gaining momentum. #PSMC# reportedly secures exclusive supply of key silicon capacitors, while #UMC# sees strong silicon bridge demand. How far can the ecosystem expand? 💡More: 🔗

Some quick thoughts on Intel's EMIB-T packaging for the new 2H27 Google TPU (Humufish). Based on my industry checks: 【How to read EMIB-T's 90% yield?】 1. Given Intel's track record running EMIB in mass production, hitting 90% technology validation yield on EMIB-T (still under development) is a very positive but reasonable data point. 2. Intel benchmarks EMIB production/assembly yield against FCBGA. Industry FCBGA yield today is generally above 98%. 3. On yield, getting from 90% to 98% is harder than getting from project kickoff to 90%. And technology validation yield ≠ final production yield, especially with some Humufish specs still unfinalized. So long-term, I'm positive on Intel's advanced packaging story. Near to mid-term, I'm staying cautious on how they get there. 【From 90% to 98%. Looks like just a few points. Does Google care? Absolutely】 1. Google recently asked TSMC how much it could save by placing wafer orders for Humufish's main compute die (designed in-house by Google) directly, rather than routing them through MediaTek. 2. Google and MediaTek have run a semi-COT model since day one (8t). MediaTek's mark-up sits mostly on the parts it designs itself, so whether Google places the wafer orders for main compute die directly isn't a key swing factor for MediaTek's earnings trajectory. 3. But Google even probing whether it can squeeze out the pass-through mark-up on wafer orders tells you something: Google has shifted from easygoing buyer to hard-nosed on cost. The reason is simple: to take on Nvidia head-on, cost is Google's edge, which makes EMIB-T production yield Google's problem to solve. For context, TSMC's yield target on 5.5-reticle CoWoS in 2026 also starts at 98%. 【TSMC's position】 1. My understanding is TSMC is still working out how much advanced-node capacity to allocate to Humufish in 2H27, for two reasons: (1) it still wants the back-end packaging orders, though looks unlikely for now, and that's by design on Google's part; and (2) it's still gauging actual back-end output from EMIB-T, to avoid misallocating scarce advanced-node capacity. 2. Humufish's effective back-end output hinges on both EMIB-T and substrates, and both need to be tracked together. 3. On the Humufish semi-COT model, TSMC also prefers MediaTek to place the wafer orders for the main compute die. Beyond the close working relationship, the key point is MediaTek is TSMC's third-largest advanced-node customer in 2025. If TPU orders shift, MediaTek's scale makes it a natural buffer for TSMC to rebalance its wafer allocation mix.

Amazon is expected to use EMIB for both Tr3.5 and Tr4, so I was puzzled when Ibiden said EMIB-T wouldn’t come online in 2027. But today, sell-side said Tr3.5 will use EMIB-M, not EMIB-T. Now the whole mystery is solved. $INTC

Intel’s EMIB Packaging Is Growing Rapidly — Silicon Capacitors Are Taking Off Too Silicon capacitors are poised for explosive growth in the AI semiconductor space. Intel has been found to be planning a large-scale adoption of silicon capacitors starting next year, in order to enhance the performance of its in-house 2.5D packaging technology, “EMIB.” The most clearly visible source of demand is Google. Google plans to launch its next-generation AI accelerator, “v8e,” in the second half of next year, and has adopted an EMIB substrate with embedded silicon capacitors for that chip. With other Big Tech companies such as Amazon also currently applying EMIB, analysts say demand could increase sharply. According to industry sources on the 27th, Intel plans to apply silicon capacitors to its 2.5D packaging starting next year. Intel Adopts “Silicon Capacitors” for 2.5D Packaging… Google AI Chip Gets First Application 2.5D is an advanced packaging technology that inserts a thin-film interposer between the semiconductor and the substrate. Because it can connect circuits at higher density compared with conventional packaging that uses only a substrate, demand is rising in the AI and HPC fields. To improve cost efficiency in 2.5D packaging, Intel devised its own technology called EMIB. Rather than using a broad, spread-out interposer, EMIB connects chip to chip using a small silicon bridge. Since bridges only need to be placed where chip-to-chip connections are required, chips can be arranged more flexibly and efficiently. Recently, EMIB has been drawing attention as an alternative to TSMC, which had been leading the existing 2.5D packaging market. This is because TSMC’s 2.5D packaging capacity is suffering from a supply shortage amid the rapid development of the AI industry. Indeed, global Big Tech player Google is also paying attention to EMIB. Google has decided to adopt EMIB for its in-house AI semiconductor “v8e,” which it plans to launch in the second half of next year. Under this structure, TSMC handles chip mass production, MediaTek handles design and manufacturing support, and Intel handles packaging. However, there have been concerns that EMIB is gradually showing limitations in providing stable power supply for AI semiconductors, which consume large amounts of power. Accordingly, Intel plans to introduce new technologies such as silicon capacitors and through-silicon vias (TSV) to ensure stable packaging for the v8e. A capacitor is a component that stores and releases electricity in an electronic circuit. In the case of silicon capacitors, their resistance (ESL/ESR) is more than 100 times lower than that of conventional multilayer ceramic capacitors (MLCC), minimizing the signal loss that occurs in high-performance semiconductors. They can also be designed in an ultra-thin structure based on a silicon wafer, enabling high-density integration. A semiconductor industry official explained, “Because the voltage drop (the phenomenon of voltage decreasing) that occurs in the high-frequency region within AI chips is difficult to solve with MLCC, we understand that Intel is adopting silicon capacitors as a solution,” adding, “The relevant supply chain is now in place, and mass production is set to begin in earnest next year.” EMIB-T Is Already on a Growth Trajectory — The Related Ecosystem and Market Are Expanding Together Intel has also inserted TSVs, which serve as power-delivery channels, into the silicon bridge. The key point is that by using TSVs to shorten the power-delivery path between the substrate and the chip, Intel has improved power efficiency and signal integrity. Intel calls this “EMIB-T.” The industry expects the EMIB-T and silicon capacitor markets to grow rapidly. This is because Japan’s Ibiden — one of the major companies that mass-produces semiconductor substrates for EMIB-T — is aggressively pursuing capital investment. Previously, Ibiden had planned to build its Kawashima (Gama) plant in Gifu Prefecture as a substrate plant for Intel CPUs. However, it postponed that schedule and decided in the first half of this year to officially convert the Gama plant into a mass-production line for EMIB-T substrates. The investment is 220 billion yen (about KRW 2.1 trillion). In its recent earnings announcement, Ibiden stated, “Operation of the Gama plant will begin in 2027 and enter full-scale mass production in 2028,” adding, “EMIB-T substrate capacity is currently far short of demand. However, adding further capacity is quite difficult, so we are discussing options with our customers.” A semiconductor industry official explained, “Ibiden’s EMIB-T-dedicated line is being built with most of the investment coming from customers such as Google, Amazon, and Intel,” adding, “This demonstrates that AI semiconductors based on EMIB-T will grow significantly going forward, and silicon capacitors are likely to expand alongside them.”

Ibiden (largest substrate supplier for intel EMIB) — earnings call Q&A Q) What is the development status and technical difficulty of EMIB-T, and when does mass production start? A) We understand that one or two competitors are also developing the relevant technology. Ibiden has largely completed the technology-establishment phase and is about to enter the yield-improvement phase ahead of full-scale mass production, which we believe puts us ahead of competitors. The technical difficulty lies in the bonding of the silicon bridge and in the core formation process. The Gama plant will be brought online in stages starting at the end of FY2027 and will contribute to earnings from FY2028. If demand materializes before then, we plan to accommodate it using existing facilities. ---------------------------------------- Reads like a de facto confirmation of 2028 EMIB-T ramp. $INTC

👀 #MediaTek# confirms its AI ASIC collaboration with #Intel’s# EMIB-T advanced packaging. The chipmaker is now pushing 400G SerDes IP to target next-gen ASIC opportunities, including reportedly #Google’s# TPU v10 and Meta’s custom AI chips.💡More: 🔗

Meta’s Muse is reigniting the CPU trade. $TSM’s CoWoS bottleneck is opening a window for Intel’s EMIB-T. Liwei and @regularwang break down the technology behind Intel’s all-in-one AI play, from CPUs and EMIB-T to 14A and optical I/O.