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Nutty
@NuttyCLD
Analog IC Designer | Structural Approach in the AI Wave | Semiconductors & Power & Optics |
1.6K Following    22.1K Followers
I happened to be working on an OCS article when @PhotonCap published this piece on the same topic. It explains how skipping optical-to-electrical conversion can reduce costs and power consumption, and why slow-moving mirrors can still be fast enough for AI training. A useful look at both the technology and the economics behind Lumentum’s rapid OCS revenue growth. My piece takes that discussion a little further, looking at how incumbents’ manufacturing experience stacks up against newcomers’ technologies. Coming soon.
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I agree. The very term “goodput” implies delivering genuinely useful value, not just raw speed. Measuring it is far from simple, and inference companies will compete fiercely to prove it. With inference chips and racks only now reaching the market, we should soon see their real utility.
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@PhotonCap ""Which chip is fastest?" toward "Does that speed actually reduce the customer's total cost?"" Only a comment about that; premium services almost must be considered. In speed or whatever reason, regardless the cost
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Even though I understand that AI-created images are difficult to protect under copyright, as an article writer who knows how challenging and time-consuming it is to generate such useful images, I find it very uncomfortable when they are shared without the original author's permission.
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It is a little surprising that a firm as large as @MorganStanley would use my image directly without asking for permission. At least they could have included a link to my Substack… Maybe the first hire at @Joule14 should be a lawyer…? 😂
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This is the first time I am publicly listing accounts I follow for signal. (The order is alphabetical.) @aleabitoreddit — AI and semiconductor supply chains @Alisvolatprop12 — Memory and AI hardware @AnalysisOp — Financial analysis, value investing, and GARP @citrini — Thematic, cross-asset research @damnang2 — Semiconductor engineer. HBM, memory, optics @demian_ai — From silicon to tokens @Frenchie_ — Trading, fundamentals, and technology @FundaAI — Research platform for public-market investors @Gaetano2026 — Photonics / Physical AI @iamfabian — Test and measurement, photonics, data-center interconnects @jmartinprin — Networks and optical infrastructure. SemiAnalysis @Joule14 — AI infrastructure research @jukan05 — Semiconductors and AI infrastructure. Citrini @KawzInvests — Photonics, AI, defense @Midnight_Captl — AI and semis. Joule14 @NURadu_ — Small caps and overlooked opportunities @NuttyCLD — Analog IC. Semiconductors, power, optics @outliercapx — Asymmetric longs @ParadisLabs — AI, tech, and macro @Pep_Invest — Technology, industry structure, supply chain @pequityresearch — Semiconductor and tech deep dives @ren_stocks — The AI buildout @rwang07 — Ex-SemiAnalysis. Semiconductors and AI infrastructure @Semicon_player — Semiconductors, written from the ground @Silicon_Atlas — AI silicon through a systems lens @StormDirac — Former Sivers CEO. Optical semiconductors and lasers @SVTrivo — Semiconductor designer. AI silicon and architecture @TheTechInvest — AI infrastructure @vikramskr — Physics-first semiconductor research Not chart accounts. Until recently I was the one being introduced. Here are the accounts I actually read. I used Grok to help compile the list. If I missed someone, that is on me. People who write semiconductors, photonics, and AI infrastructure through structure. I do not agree with all of them on every name. I do learn from all of them. Markets react to earnings calls. Physics doesn't.
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I have introduced quite a few Silicon Valley insiders here on X, and here is another person who deserves your attention. @Silicon_Atlas is a longtime semiconductor industry veteran based in the Bay Area. The quality of his research and analysis is exceptional, yet his follower count is still criminally low. Get in early and follow him now!!! I am meeting him in person tomorrow, and I am really looking forward to hearing the insights he has to share🤗
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Quantum computing is clearly still a sector where traditional valuation based on revenue or earnings is difficult. But that does not mean the right conclusion is to ignore the space or come back to it later. If anything, this is a time when we need to study it seriously. Knowing @PhotonCap's technical background well, I can confidently say that he is one of the best tutors I know for doing exactly that. I am learning a lot from him myself. From an investment perspective, I think we should at least start by separating the opportunities into a few buckets: whether to bet directly on quantum companies, whether to bet on the infrastructure and physical bottlenecks that will be needed regardless of which technology wins, or whether to bet on large companies where quantum may still be a small part of the business but which could end up owning critical platforms or standards across the ecosystem. His latest piece goes much deeper than that, breaking down individual companies and analyzing their strengths and weaknesses in detail. But more than the individual scores, the main takeaway for me is a broader question: Can we keep investing in this industry without having to predict the technology winner? In a field like quantum, where technological uncertainty is still extremely high, trying to identify what will ultimately win may be less useful than asking what will still be necessary no matter what wins. To me, that is the most important idea in this piece.
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Memory allocation is becoming a key topic, and we will likely continue to see many different combinations and architectures emerge. From an investment perspective, that may actually make this a period that requires extra caution. Even with a player as dominant as NVIDIA, smaller companies with more unconventional architectures may continue to prove highly effective for certain applications. Still, a technology win does not necessarily translate into an economic win. It is still unclear whether today’s divergence is simply a path toward convergence around one dominant architecture, or the beginning of a more fragmented market shaped by different workloads. But for memory makers, the implication seems relatively clear. Rather than going all-in on HBM, it may be safer to maintain a broad lineup and optionality across HBM, DDR, LPDDR, NAND, CXL, and other parts of the memory hierarchy. At this stage, the key may be less about picking the final winner and more about identifying who has the most options as the architecture continues to evolve.
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Really looking forward to seeing @damnang2 and @Midnight_Captl create even more value with @joule14! 🎉
Excited to announce @joule14, our dedicated research firm for AI / semiconductors Joule14 is to go to the next level with my research and begin offering products and services that go beyond my Substack, as well as providing a framework to more deeply engage with institutional clients who already subscribe to me As for my personal Substack moving fwd, I plan on continuing to post just as frequently to it, so Joule14 is not changing anything there I’m looking forward to sharing what we’re building. More soon
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The Advanced Packaging Primer The value in AI semiconductors is increasingly moving off the wafer. Better transistors alone are no longer enough. Multiple compute dies and HBM have to be connected as one system, powered, cooled, and assembled without losing yield. That increasingly determines both performance and how many systems can actually ship. And the money is following. Processes that once sat quietly in the back end, including grinding and dicing, interposers and substrates, bonding, thermal materials, inspection, and test, are becoming much more equipment and capital intensive. But the economics are very different at each step. Some suppliers earn more every time another wafer or die passes through their installed base. Others are tied much more closely to a specific packaging format and its capex cycle. That distinction matters more as packages get larger, stacking gets more complex, and manufacturing moves toward new formats. Ozeco and I have been working on The Advanced Packaging Primer, a deep dive into where value is accumulating across this stack and which parts can hold onto it as the architecture changes. Publishing soon.
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SoftBank-backed SB Energy ($SBE) filed for a U.S. IPO on September 1. In the first half, it posted $138.7M in revenue, a $3.21B net loss, roughly $439B in backlog, and 8.8 GW of data center capacity contracted or under construction, with zero data centers operating today. OpenAI is a major customer, and Nvidia plans to invest $1.5B at the IPO price.
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A great primer for getting the big picture on memory. SRAM, DRAM, NAND, DDR, and HBM are all laid out clearly and connected in a way that’s easy to follow.
I like his articles and his drawings too!
I’m excited to launch the official Substack at under @SVTrivo Second deep-dive is up — a retouched and updated version of my earlier piece: 'Why They Could No Longer Rely on NVIDIA GPUs Alone' 📌 Read the 2nd post: 7-day free Subscription is activated! #SVTrivo# #Substack#
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Hot Chips 2026 was not just a week of new chip launches. AI inference is being unbundled. Workload → compute → memory → rack. This piece is a handbook for understanding why that shift is pushing inference toward heterogeneous computing. The future of inference is not one faster chip. It is a better division of labor.
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One thing I really appreciate about both Damnang and PhotonCap is their ability to write the right piece at the right time. Most readers here probably no longer think of HBF as simply the “next generation of HBM.” The more interesting question now is how HBF could actually enter the AI memory hierarchy, and what changes around it if it does. @damnang2 approaches this from the HBF architecture itself. He separates model weights from KV cache, looks at their very different read/write characteristics, and asks what realistically belongs in HBF versus HBM. From there, he connects the technical constraints to customer adoption and ultimately to what HBF could mean for Sandisk. @PhotonCap comes at the same broader problem from the physical architecture side. He looks at where memory should sit relative to compute, beside, above, or beyond it, and what those different placements imply for bandwidth, packaging, system design, and eventually optics. Different angles, but very complementary. Both are exactly the kind of pieces that help frame the right questions at the right moment.
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A former colleague and friend of mine, @Silicon_Atlas has just started writing on X and Substack. He’s one of those rare experts who can connect a remarkably broad range of topics, from IC design and system architecture to AI/ML, without losing depth. In this piece, he goes beyond treating zHBM as just another memory technology and clearly explains why the cost of moving data in AI systems is increasingly forcing changes in the architecture itself. I’m really looking forward to what he publishes next. If you’re interested in the intersection of hardware and AI, I highly recommend following him.
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A few thoughts on today’s SemiAnalysis TPU report. 1. I am deeply disappointed with the way SemiAnalysis continues to report on these issues. I have raised the same concern before with Micron, CPO delays, SOCAMM, and 8 high HBM4. I do not think they simply fabricate stories out of thin air. The problem is how they communicate them. They often seem too quick to report information that has not yet been confirmed, and even when the underlying facts are directionally correct, the ambiguity in the wording and framing repeatedly creates major misunderstandings in the market. 2. This TPU report is another example. If you actually read the substance, the 2026 AVGO TPU downward revision is explicitly attributed to supply constraints and challenges ramping CoWoS S. The 2027 revision is attributed to greater Broadcom capacity allocation toward other customers such as Meta and OpenAI. The AMD discussion, meanwhile, is about a potential TPU v10 project. The report does not establish any causal relationship between these two issues. Yet by placing them directly next to each other, it created a framing that could very easily be interpreted by institutional and professional investors quickly scanning the report as a simple "AMD Long, AVGO Short narrative" I am not saying that SemiAnalysis intentionally framed it this way. However, if they did not anticipate that kind of market interpretation, then I think this reflects a serious communication and editorial problem. On the other hand, if they did anticipate it, then I have to ask why they did not include even a single clear sentence explaining that the AVGO TPU downward revision was not being attributed to AMD. 3. Anyone who understands the ASIC business even at a basic level should know how dangerous this kind of overinterpretation can be. AVGO signed a long term agreement with Google just this April to develop and supply future generations of TPUs. The claim that AMD is already taking Broadcom’s TPU volume is simply not supported by the information presented in this report. And if the AMD collaboration they are referring to is related to on package CPU cores, then that is not really a threatening area for AVGO in the first place, because Broadcom is not competing in the x86 CPU market. A much simpler interpretation would be that Google may need x86 cores for specific use cases, such as RL workloads, and AMD could be relevant there. 4. Today I spoke not only with people in the semiconductor industry, but also with a friend who works at a New York hedge fund. He agreed with my view completely, while also pointing out that we cannot ignore either the influence of SemiAnalysis reports or the direction in which capital ultimately moves. Is this really healthy market behavior? This is the part that concerns me most. I assume SemiAnalysis understands very well how much influence its reports can have on the market. If so, I believe that influence should come with a much greater degree of care in how information is framed and communicated. This is not the first time this year that I have had concerns about this type of reporting, which is why I felt it was important to call it out directly this time. 5. In the end, I believe the ASIC business comes down to the quality of the IP and the ability to secure sufficient manufacturing capacity. AVGO has competed with Marvell on these fronts for many years and has continued to survive and win. It will continue to face challenges from other competitors on these same fronts, whether that competitor is AMD, Marvell, or someone else. So let us think again about what we should actually be asking. Why did AVGO recently enter into such a large strategic MOU with Samsung? What is AVGO preparing for next in its ASIC business? From a technical perspective, what are the actual risks facing its ASIC business? From AVGO’s perspective, in what ways could a more diversified customer base actually become a long term positive? I believe these are the questions that deserve much deeper analysis. Why does SemiAnalysis not address them? I am genuinely disappointed with this report. At this point, I am honestly irritated that I keep having to spend my valuable time rechecking the same facts every time this kind of ambiguous reporting creates another round of confusion in the market.
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Two months on from SemiAnalysis's CPO delay thesis, I've heard so much on this that "optical" and "CPO" have become tiring words. That doesn't mean you can afford to ignore them. What matters is a shift in framing. You may not actually need to pin down exactly when CPO scales into meaningful volume. Instead of predicting the date, watch the order in which the supply chain prepares for it. Test equipment orders come first, then capacity gets reserved, then real money gets committed against it. That isn't expectation. It's cash tied to future volume. @damnang2's latest piece goes straight at that sequence.
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